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SN74LVC2G06-Q1 PDF预览

SN74LVC2G06-Q1

更新时间： 2024-11-23 22:21:07
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
7页 118K
描述
DUAL INVERTER BUFFER/DRIVER WITH OPEN DRAIN OUTPUTS

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中文翻译

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SN74LVC2G06-Q1 数据手册

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SCES617 − OCTOBER 2004  
D
Qualification in Accordance With  
AEC-Q100  
D
D
D
D
Inputs and Open-Drain Outputs Accept  
Voltages Up To 5.5 V  
†
D
Qualified for Automotive Applications  
I
Supports Partial-Power-Down Mode  
off  
Operation  
D
Customer-Specific Configuration Control  
Can Be Supported Along With  
Major-Change Approval  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
D
D
D
D
D
Supports 5-V V  
Operation  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
CC  
Max t of 3.4 ns at 3.3 V  
pd  
Low Power Consumption, 10-µA Max I  
CC  
− 1000-V Charged-Device Model (C101)  
24-mA Output Drive at 3.3 V  
DBV OR DCK PACKAGE  
(TOP VIEW)  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
A
D
Typical V  
(Output V  
Undershoot)  
1
2
3
6
5
4
OHV  
OH  
1A  
GND  
2A  
1Y  
>2 V at V  
= 3.3 V, T = 25°C  
CC  
A
V
CC  
†
Contact factory for details. Q100 qualification data available on  
request.  
2Y  
description/ordering information  
This dual inverter buffer/driver is designed for 1.65-V to 5.5-V V  
operation.  
CC  
The output of the SN74LVC2G06 device is open drain and can be connected to other open-drain outputs to  
implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
‡
SOT (SOT-23) − DBV  
SOT (SC-70) − DCK  
Tape and reel SN74LVC2G06QDBVRQ1  
C06_  
−40°C to 125°C  
Tape and reel SN74LVC2G06QDCKRQ1 CT_  
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.  
Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).  
FUNCTION TABLE  
(each inverter)  
INPUT  
A
OUTPUT  
Y
H
L
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2004, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

中文翻译

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SN74LVC2G06-Q1 替代型号

型号 品牌 替代类型 描述 数据表
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