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SN74LVC125AQDRG4Q1

更新时间： 2024-11-20 12:22:31
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德州仪器 - TI 输出元件
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11页 247K
描述
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

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SN74LVC125AQDRG4Q1 数据手册

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SN74LVC125A-Q1  
www.ti.com .................................................................................................................................................. SCAS762B–FEBRUARY 2004–REVISED APRIL 2008  
QUADRUPLE BUS BUFFER GATE  
WITH 3-STATE OUTPUTS  
1
FEATURES  
•
•
•
•
•
•
Qualified for Automotive Applications  
Operates From 1.65 V to 3.6 V  
Specified From –40°C to 125°C  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.8 ns at 3.3 V  
•
ESD Protection Exceeds JESD 22  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
1000-V Charged-Device Model (C101)  
D OR PW PACKAGE  
(TOP VIEW)  
Typical VOLP (Output Ground Bounce) <0.8 V at  
VCC = 3.3 V, TA = 25°C  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
•
•
Typical VOHV (Output VOH Undershoot) >2 V at  
VCC = 3.3 V, TA = 25°C  
1OE  
1A  
V
CC  
4OE  
4A  
4Y  
3OE  
3A  
3Y  
1Y  
2OE  
2A  
2Y  
GND  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
8
abc  
DESCRIPTION/ORDERING INFORMATION  
This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation.  
The SN74LVC125A features independent line drivers with 3-state outputs. Each output is disabled when the  
associated output-enable (OE) input is high.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in  
a mixed 3.3-V/5-V system environment.  
ORDERING INFORMATION(1)  
TA  
PACKAGE(2)  
Reel of 2500  
Reel of 2000  
ORDERABLE PART NUMBER  
SN74LVC125AQDRQ1  
TOP-SIDE MARKING  
LC125AQ  
SOIC – D  
–40°C to 125°C  
TSSOP – PW  
SN74LVC125AQPWRQ1  
LC125AQ  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
web site at www.ti.com.  
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
FUNCTION TABLE  
(EACH BUFFER)  
INPUTS  
OE  
OUTPUT  
Y
A
H
L
L
L
H
L
H
X
Z
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2004–2008, Texas Instruments Incorporated  
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SN74LVC125AQDRG4Q1 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC125AQDRQ1 TI

完全替代

 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
SN74LVC125AMDREP TI

类似代替

 Enhanced Product Quadruple Bus Buffer Gate With 3-State Outputs 14-SOIC -55 to 125
SN74LVC125ADBR TI

类似代替

 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

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