是否无铅: | 不含铅 | 是否Rohs认证: | 符合 |
生命周期: | Obsolete | 零件包装代码: | SOIC |
包装说明: | GREEN, PLASTIC, SOP-16 | 针数: | 16 |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.68 | 系列: | LVC/LCX/Z |
JESD-30 代码: | R-PDSO-G16 | JESD-609代码: | e4 |
长度: | 10.2 mm | 负载电容(CL): | 50 pF |
逻辑集成电路类型: | J-K FLIP-FLOP | 最大频率@ Nom-Sup: | 150000000 Hz |
最大I(ol): | 0.024 A | 湿度敏感等级: | 1 |
位数: | 2 | 功能数量: | 2 |
端子数量: | 16 | 最高工作温度: | 85 °C |
最低工作温度: | -40 °C | 输出极性: | COMPLEMENTARY |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | SOP |
封装等效代码: | SOP16,.3 | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE | 包装方法: | TAPE AND REEL |
峰值回流温度(摄氏度): | 260 | 电源: | 3.3 V |
Prop。Delay @ Nom-Sup: | 5.9 ns | 传播延迟(tpd): | 7.1 ns |
认证状态: | Not Qualified | 座面最大高度: | 2 mm |
子类别: | FF/Latches | 最大供电电压 (Vsup): | 3.6 V |
最小供电电压 (Vsup): | 1.65 V | 标称供电电压 (Vsup): | 1.8 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | INDUSTRIAL | 端子面层: | Nickel/Palladium/Gold (Ni/Pd/Au) |
端子形式: | GULL WING | 端子节距: | 1.27 mm |
端子位置: | DUAL | 处于峰值回流温度下的最长时间: | NOT SPECIFIED |
触发器类型: | NEGATIVE EDGE | 宽度: | 5.3 mm |
最小 fmax: | 150 MHz | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
SN74LVC112APW | TI |
获取价格 |
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET | |
SN74LVC112APWE4 | TI |
获取价格 |
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET | |
SN74LVC112APWG4 | TI |
获取价格 |
LVC/LCX/Z SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 | |
SN74LVC112APWLE | TI |
获取价格 |
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET | |
SN74LVC112APWR | TI |
获取价格 |
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET | |
SN74LVC112APWRE4 | TI |
获取价格 |
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET | |
SN74LVC112APWRG4 | TI |
获取价格 |
Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-TSSOP -40 to 125 | |
SN74LVC112APWT | TI |
获取价格 |
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET | |
SN74LVC112APWTE4 | TI |
获取价格 |
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET | |
SN74LVC112APWTG4 | TI |
获取价格 |
Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-TSSOP -40 to 85 |