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SN74LV11ADGVRG4 PDF预览

SN74LV11ADGVRG4

更新时间: 2024-11-16 05:17:11
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德州仪器 - TI 输入元件
页数 文件大小 规格书
15页 476K
描述
TRIPLE 3-INPUT POSITIVE-AND GATES

SN74LV11ADGVRG4 数据手册

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ꢀꢁꢂ ꢃ ꢄꢅꢆꢆ ꢇꢈ ꢀ ꢁꢉ ꢃꢄꢅ ꢆꢆꢇ  
ꢊ ꢋꢌꢍ ꢄꢎ ꢏ ꢐꢌꢁ ꢍꢑꢊ ꢍꢒ ꢀꢌ ꢊ ꢌꢅꢎ ꢐꢇꢁ ꢓ ꢔ ꢇꢊꢎ ꢀ  
SCES345D − DECEMBER 2000 − REVISED APRIL 2005  
SN54LV11A . . . J OR W PACKAGE  
SN74LV11A . . . D, DB, DGV, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
D
D
2-V to 5.5-V V  
Operation  
CC  
Max t of 7 ns at 5 V  
pd  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1B  
2A  
2B  
2C  
V
CC  
= 3.3 V, T = 25°C  
A
1C  
1Y  
3C  
3B  
3A  
3Y  
Typical V  
>2.3 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
Support Mixed-Mode Voltage Operation on  
All Ports  
2Y  
GND  
I
Supports Partial-Power-Down Mode  
off  
8
Operation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
SN54LV11A . . . FK PACKAGE  
(TOP VIEW)  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
3
2
1
20 19  
18  
− 1000-V Charged-Device Model (C101)  
1Y  
NC  
3C  
2A  
NC  
2B  
4
5
6
7
8
17  
16  
description/ordering information  
15 NC  
14  
9 10 11 12 13  
NC  
2C  
These triple 3-input positive-AND gates are  
3B  
designed for 2-V to 5.5-V V  
operation.  
CC  
The ’LV11A devices perform the Boolean function  
Y + A B C or Y + A ) B ) C  
logic.  
in positive  
NC − No internal connection  
These devices are fully specified for  
partial-power-down applications using I . The I  
off  
off  
circuitry disables the outputs, preventing  
damaging current backflow through the devices  
when they are powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
Tube of 50  
SN74LV11AD  
SOIC − D  
LV11A  
Reel of 2500  
Reel of 2000  
Reel of 2000  
Tube of 90  
SN74LV11ADR  
SN74LV11ANSR  
SN74LV11ADBR  
SN74LV11APW  
SN74LV11APWR  
SN74LV11APWT  
SN74LV11ADGVR  
SNJ54LV11AJ  
SOP − NS  
74LV11A  
LV11A  
SSOP − DB  
−40°C to 85°C  
Reel of 2000  
Reel of 250  
TSSOP − PW  
LV11A  
TVSOP − DGV Reel of 2000  
LV11A  
CDIP − J  
CFP − W  
LCCC − FK  
Tube of 25  
Tube of 150  
Tube of 55  
SNJ54LV11AJ  
SNJ54LV11AW  
SNJ54LV11AFK  
SNJ54LV11AW  
SNJ54LV11AFK  
−55°C to 125°C  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2005, Texas Instruments Incorporated  
ꢑ ꢁ ꢄꢎꢀꢀ ꢒ ꢊꢕ ꢎꢋꢖ ꢌꢀ ꢎ ꢁ ꢒꢊꢎꢓ ꢗꢘ ꢙꢚ ꢛꢜꢝ ꢞꢟꢠ ꢡꢗ ꢝꢜ ꢡꢗꢢ ꢙꢡꢚ ꢍꢋ ꢒ ꢓ ꢑ ꢣꢊ ꢌꢒ ꢁ  
ꢊꢠꢪ  
ꢚꢗ  
ꢦꢢ ꢥ ꢢ ꢟ ꢠ ꢗ ꢠ ꢥ ꢚ ꢩ  
ꢝꢠ  
ꢚꢗ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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