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SN74LV11A-EP

更新时间： 2024-11-27 12:21:51
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
11页 509K
描述
TRIPLE 3-INPUT POSTIVE-AND GATE

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SN74LV11A-EP 数据手册

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SCLS564A − JANUARY 2004 − REVISED MAY 2004  
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
D
D
D
Typical V  
<0.8 V at V = 3.3 V, T = 25°C  
(Output Ground Bounce)  
OLP  
CC  
A
Typical V  
>2.3 V at V  
(Output V  
Undershoot)  
OHV  
OH  
D
D
Extended Temperature Performance of  
−40°C to 105°C  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
= 3.3 V, T = 25°C  
CC A  
Supports Mixed-Mode Voltage Operation on  
All Ports  
I
Supports Partial-Power-Down Mode  
off  
D
D
D
Enhanced Product-Change Notification  
Operation  
PW PACKAGE  
(TOP VIEW)  
†
Qualification Pedigree  
2-V to 5.5-V V  
Operation  
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1B  
2A  
2B  
2C  
2Y  
V
CC  
†
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
1C  
1Y  
3C  
3B  
3A  
3Y  
8
GND  
description/ordering information  
This triple 3-input positive-AND gate is designed for 2-V to 5.5-V V  
operation.  
CC  
Y + A • B • C or Y + A ) B ) C  
The SN74LV11A performs the Boolean function  
in positive logic.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
‡
T
A
PACKAGE  
−40°C to 105°C  
TSSOP − PW Tape and reel  
SN74LV11ATPWREP  
LV11AEP  
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
H
L
B
H
X
L
C
H
X
X
L
H
L
L
L
X
X
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2004, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

中文翻译

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SN74LV11A-EP 替代型号

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