5秒后页面跳转
SN74LS74ADR2 PDF预览

SN74LS74ADR2

更新时间: 2024-11-25 19:51:23
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管输出元件
页数 文件大小 规格书
8页 102K
描述
LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, PLASTIC, SOIC-14

SN74LS74ADR2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.25
针数:14Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.07
系列:LSJESD-30 代码:R-PDSO-G14
JESD-609代码:e0长度:8.65 mm
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:25000000 Hz
最大I(ol):0.008 A位数:1
功能数量:2端子数量:14
最高工作温度:70 °C最低工作温度:
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):8 mA
传播延迟(tpd):40 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:FF/Latches
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:3.9 mm最小 fmax:25 MHz
Base Number Matches:1

SN74LS74ADR2 数据手册

 浏览型号SN74LS74ADR2的Datasheet PDF文件第2页浏览型号SN74LS74ADR2的Datasheet PDF文件第3页浏览型号SN74LS74ADR2的Datasheet PDF文件第4页浏览型号SN74LS74ADR2的Datasheet PDF文件第5页浏览型号SN74LS74ADR2的Datasheet PDF文件第6页浏览型号SN74LS74ADR2的Datasheet PDF文件第7页 
The SN74LS74A dual edge-triggered flip-flop utilizes Schottky  
TTL circuitry to produce high speed D-type flip-flops. Each flip-flop  
has individual clear and set inputs, and also complementary Q and Q  
outputs.  
http://onsemi.com  
Information at input D is transferred to the Q output on the  
positive-going edge of the clock pulse. Clock triggering occurs at a  
voltage level of the clock pulse and is not directly related to the  
transition time of the positive-going pulse. When the clock input is at  
either the HIGH or the LOW level, the D input signal has no effect.  
LOW  
POWER  
SCHOTTKY  
MODE SELECT – TRUTH TABLE  
INPUTS  
OUTPUTS  
OPERATING MODE  
S
D
S
D
D
Q
Q
14  
Set  
L
H
L
H
H
H
L
L
H
H
X
X
X
h
l
H
L
H
H
L
L
H
H
L
Reset (Clear)  
*Undetermined  
Load “1” (Set)  
Load “0” (Reset)  
1
PLASTIC  
N SUFFIX  
CASE 646  
H
*
Both outputs will be HIGH while both S and C are LOW, but the output  
D D  
states are unpredictable if S and C go HIGH simultaneously. If the levels  
D
D
at the set and clear are near V maximum then we cannot guarantee to meet  
IL  
the minimum level for V  
.
OH  
H, h = HIGH Voltage Level  
L, I = LOW Voltage Level  
X = Don’t Care  
14  
1
l, h (q) = Lower case letters indicate the state of the referenced input  
SOIC  
D SUFFIX  
CASE 751A  
i, h (q) = (or output) one set-up time prior to the HIGH to LOW clock transition.  
ORDERING INFORMATION  
GUARANTEED OPERATING RANGES  
Symbol  
Parameter  
Supply Voltage  
Min  
4.75  
0
Typ  
5.0  
25  
Max  
5.25  
70  
Unit  
V
Device  
Package  
14 Pin DIP  
14 Pin  
Shipping  
V
CC  
SN74LS74AN  
SN74LS74AD  
2000 Units/Box  
T
A
Operating Ambient  
Temperature Range  
°C  
2500/Tape & Reel  
I
Output Current – High  
Output Current – Low  
0.4  
8.0  
mA  
mA  
OH  
I
OL  
Semiconductor Components Industries, LLC, 1999  
1
Publication Order Number:  
December, 1999 – Rev. 6  
SN74LS74A/D  

SN74LS74ADR2 替代型号

型号 品牌 替代类型 描述 数据表
SN74LS74AD ONSEMI

功能相似

LOW POWER SCHOTTKY

与SN74LS74ADR2相关器件

型号 品牌 获取价格 描述 数据表
SN74LS74ADRE4 TI

获取价格

DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
SN74LS74ADRE4 ROCHESTER

获取价格

D Flip-Flop, LS Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, TTL,
SN74LS74ADRG4 ROCHESTER

获取价格

D Flip-Flop, LS Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, TTL,
SN74LS74ADRG4 TI

获取价格

DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
SN74LS74AFN TI

获取价格

IC LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC20, FF/L
SN74LS74AFN3 TI

获取价格

IC JBAR-KBAR FLIP-FLOP, FF/Latch
SN74LS74AJ MOTOROLA

获取价格

D Flip-Flop, 2-Func, Positive Edge Triggered, TTL, CDIP14
SN74LS74AJ TI

获取价格

DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
SN74LS74AJD MOTOROLA

获取价格

LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14, CERAMIC
SN74LS74AJDS MOTOROLA

获取价格

D Flip-Flop, LS Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, TTL,