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SN74LS74AMEL PDF预览

SN74LS74AMEL

更新时间: 2024-10-01 13:13:51
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 106K
描述
LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, EIAJ, SOP-14

SN74LS74AMEL 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP14,.3
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.29
Is Samacsys:N系列:LS
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:10.2 mm逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:25000000 Hz最大I(ol):0.008 A
位数:1功能数量:2
端子数量:14最高工作温度:70 °C
最低工作温度:输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):8 mA传播延迟(tpd):40 ns
认证状态:Not Qualified座面最大高度:2.05 mm
子类别:FF/Latches最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:5.275 mm
最小 fmax:25 MHzBase Number Matches:1

SN74LS74AMEL 数据手册

 浏览型号SN74LS74AMEL的Datasheet PDF文件第2页浏览型号SN74LS74AMEL的Datasheet PDF文件第3页浏览型号SN74LS74AMEL的Datasheet PDF文件第4页浏览型号SN74LS74AMEL的Datasheet PDF文件第5页浏览型号SN74LS74AMEL的Datasheet PDF文件第6页浏览型号SN74LS74AMEL的Datasheet PDF文件第7页 
The SN74LS74A dual edge-triggered flip-flop utilizes Schottky  
TTL circuitry to produce high speed D-type flip-flops. Each flip-flop  
has individual clear and set inputs, and also complementary Q and Q  
outputs.  
http://onsemi.com  
Information at input D is transferred to the Q output on the  
positive-going edge of the clock pulse. Clock triggering occurs at a  
voltage level of the clock pulse and is not directly related to the  
transition time of the positive-going pulse. When the clock input is at  
either the HIGH or the LOW level, the D input signal has no effect.  
LOW  
POWER  
SCHOTTKY  
MODE SELECT – TRUTH TABLE  
INPUTS  
OUTPUTS  
OPERATING MODE  
S
D
S
D
D
Q
Q
14  
Set  
L
H
L
H
H
H
L
L
H
H
X
X
X
h
l
H
L
H
H
L
L
H
H
L
Reset (Clear)  
*Undetermined  
Load “1” (Set)  
Load “0” (Reset)  
1
PLASTIC  
N SUFFIX  
CASE 646  
H
*
Both outputs will be HIGH while both S and C are LOW, but the output  
D D  
states are unpredictable if S and C go HIGH simultaneously. If the levels  
D
D
at the set and clear are near V maximum then we cannot guarantee to meet  
IL  
the minimum level for V  
.
OH  
H, h = HIGH Voltage Level  
L, I = LOW Voltage Level  
X = Don’t Care  
14  
1
l, h (q) = Lower case letters indicate the state of the referenced input  
SOIC  
D SUFFIX  
CASE 751A  
i, h (q) = (or output) one set-up time prior to the HIGH to LOW clock transition.  
ORDERING INFORMATION  
GUARANTEED OPERATING RANGES  
Symbol  
Parameter  
Supply Voltage  
Min  
4.75  
0
Typ  
5.0  
25  
Max  
5.25  
70  
Unit  
V
Device  
Package  
14 Pin DIP  
14 Pin  
Shipping  
V
CC  
SN74LS74AN  
SN74LS74AD  
2000 Units/Box  
T
A
Operating Ambient  
Temperature Range  
°C  
2500/Tape & Reel  
I
Output Current – High  
Output Current – Low  
0.4  
8.0  
mA  
mA  
OH  
I
OL  
Semiconductor Components Industries, LLC, 1999  
1
Publication Order Number:  
December, 1999 – Rev. 6  
SN74LS74A/D  

SN74LS74AMEL 替代型号

型号 品牌 替代类型 描述 数据表
DM74LS74ASJ FAIRCHILD

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