SN74LS112D

更新时间： 2024-11-20 23:06:19

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		触发器
页数	文件大小	规格书
4页	150K
描述
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

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数据手册

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SN74LS112D 数据手册

SN54/74LS112A

DUAL JK NEGATIVE

EDGE-TRIGGERED FLIP-FLOP

The SN54/74LS112A dual JK flip-flop features individual J, K, clock, and

asynchronous set and clear inputs to each flip-flop. When the clock goes

HIGH, the inputs are enabled and data will be accepted. The logic level of the

J and K inputs may be allowed to change when the clock pulse is HIGH and

thebistablewillperformaccordingtothetruthtableaslongasminimumset-up

and hold time are observed. Input data is transferred to the outputs on the

negative-going edge of the clock pulse.

DUAL JK NEGATIVE

EDGE-TRIGGERED FLIP-FLOP

LOW POWER SCHOTTKY

LOGIC DIAGRAM (Each Flip-Flop)

J SUFFIX

CERAMIC

CASE 620-09

N SUFFIX

PLASTIC

CASE 648-08

D SUFFIX

SOIC

CASE 751B-03

ORDERING INFORMATION

SN54LSXXXJ Ceramic

SN74LSXXXN Plastic

SN74LSXXXD SOIC

MODE SELECT — TRUTH TABLE

INPUTS

OUTPUTS

OPERATING MODE

Set

LOGIC SYMBOL

Reset (Clear)

*Undetermined

Toggle

Load “0” (Reset)

Load “1” (Set)

Hold

* BothoutputswillbeHIGHwhilebothS andC areLOW,buttheoutputstates

are unpredictable if S and C go HIGH simultaneously.

H, h = HIGH Voltage Level

L, I = LOW Voltage Level

X = Don’t Care

l, h (q) = Lower case letters indicate the state of the referenced input (or output)

l, h (q) = one set-up time prior to the HIGH to LOW clock transition.

FAST AND LS TTL DATA

5-185

12 3 4

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与SN74LS112D相关器件

型号	品牌	获取价格	描述	数据表
SN74LS112N	TI	获取价格	DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
SN74LS112N	MOTOROLA	获取价格	DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
SN74LS112N3	TI	获取价格	J-K Flip-Flop
SN74LS113A	TI	获取价格	DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET
SN74LS113A	MOTOROLA	获取价格	DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
SN74LS113AD	TI	获取价格	DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET
SN74LS113AD3	ROCHESTER	获取价格	J-K Flip-Flop
SN74LS113AD3	TI	获取价格	IC,FLIP-FLOP,DUAL,J/K TYPE,LS-TTL,SOP,14PIN,PLASTIC
SN74LS113ADR	TI	获取价格	LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
SN74LS113ADR2	MOTOROLA	获取价格	J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TT