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ꢊ ꢅꢋꢈꢌ ꢋ ꢍꢈꢁꢀ ꢎꢈꢍꢏ ꢁꢋ ꢐꢑꢋ ꢒꢎ ꢏ ꢌꢈꢋꢅ ꢄ ꢏꢀ
ꢓ ꢔꢋ ꢄ ꢇ ꢑꢀꢋꢈꢋ ꢏ ꢊ ꢕꢋ ꢎꢕ ꢋꢀ
SCLS147E − DECEMBER 1982 − REVISED SEPTEMBER 2003
D
D
D
Wide Operating Voltage Range of 2 V to 6 V
D
Typical t = 21 ns
pd
High-Current 3-State Outputs Drive Bus
Lines Directly or Up To 15 LSTTL Loads
D
D
D
6-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Bus-Structured Pinout
Low Power Consumption, 80-µA Max I
CC
SN54HC573A . . . J OR W PACKAGE
SN74HC573A . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
SN54HC573A . . . FK PACKAGE
(TOP VIEW)
OE
1D
2D
3D
4D
5D
6D
7D
8D
V
CC
1Q
2Q
1
2
3
4
5
6
7
8
9
20
19
18
3
2
1
20 19
18
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
4
5
6
7
8
17
16
15
14
17 3Q
16 4Q
15 5Q
14 6Q
13 7Q
12 8Q
11 LE
9 10 11 12 13
GND 10
description/ordering information
These octal transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive
or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the
outputs are latched to retain the data that was set up.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without interface or pullup components.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
Tube of 25
Tube of 40
Reel of 2500
Reel of 2000
Reel of 2000
Reel of 250
Tube of 25
Tube of 150
Tube of 55
SN74HC573AN
SN74HC573AN
SN74HC573ADW
SN74HC573ADWR
SN74HC573ADBR
SN74HC573APWR
SN74HC573APWT
SNJ54HC573AJ
SOIC − DW
SSOP − DB
HC573A
HC573A
−40°C to 85°C
TSSOP − PW
HC573A
CDIP − J
CFP − W
LCCC − FK
SNJ54HC573AJ
SNJ54HC573AW
SNJ54HC573AFK
−55°C to 125°C
SNJ54HC573AW
SNJ54HC573AFK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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