5秒后页面跳转
SN74HC573AQPWRQ1 PDF预览

SN74HC573AQPWRQ1

更新时间: 2024-11-25 22:05:47
品牌 Logo 应用领域
德州仪器 - TI 锁存器逻辑集成电路光电二极管输出元件驱动
页数 文件大小 规格书
9页 205K
描述
OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

SN74HC573AQPWRQ1 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:ROHS COMPLIANT, PLASTIC, TSSOP-20针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.22Is Samacsys:N
系列:HC/UHJESD-30 代码:R-PDSO-G20
长度:6.5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.006 A
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
Prop。Delay @ Nom-Sup:53 ns传播延迟(tpd):335 ns
认证状态:Not Qualified筛选级别:AEC-Q100
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

SN74HC573AQPWRQ1 数据手册

 浏览型号SN74HC573AQPWRQ1的Datasheet PDF文件第2页浏览型号SN74HC573AQPWRQ1的Datasheet PDF文件第3页浏览型号SN74HC573AQPWRQ1的Datasheet PDF文件第4页浏览型号SN74HC573AQPWRQ1的Datasheet PDF文件第5页浏览型号SN74HC573AQPWRQ1的Datasheet PDF文件第6页浏览型号SN74HC573AQPWRQ1的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢂꢇ ꢈꢉ ꢊ ꢋ  
ꢌ ꢅꢍꢈꢎ ꢍ ꢏꢈꢁꢀ ꢐꢈꢏꢑ ꢁꢍ ꢒꢉꢍ ꢓꢐ ꢑ ꢎꢈꢍꢅ ꢄ  
ꢔ ꢕꢍ ꢄ ꢇ ꢉꢀꢍꢈꢍ ꢑ ꢌ ꢖꢍ ꢐ ꢖꢍꢀ  
SCLS600 − NOVEMBER 2004  
DW OR PW PACKAGE  
(TOP VIEW)  
D
Qualification in Accordance With  
AEC-Q100  
D
Qualified for Automotive Applications  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1Q  
2Q  
1
2
3
4
5
6
7
8
9
20  
19  
18  
D
Customer-Specific Configuration Control  
Can Be Supported Along With  
Major-Change Approval  
17 3Q  
16 4Q  
15 5Q  
14 6Q  
13 7Q  
12 8Q  
11 LE  
D
D
Wide Operating Voltage Range of 2 V to 6 V  
High-Current 3-State Outputs Drive Bus  
Lines Directly or up to 15 LSTTL Loads  
D
D
D
D
D
Low Power Consumption, 80-µA Max I  
Typical t = 21 ns  
pd  
6-mA Output Drive at 5 V  
Low Input Current of 1 µA Max  
Bus-Structured Pinout  
CC  
GND 10  
Contact factory for details. Q100 qualification data available on  
request.  
description/ordering information  
This octal transparent D-type latch features 3-state outputs designed specifically for driving highly capacitive  
or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports,  
bidirectional bus drivers, and working registers.  
While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the  
outputs are latched to retain the data that was set up.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive  
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines  
without interface or pullup components.  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CC  
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
SOIC − DW  
Reel of 2500  
Reel of 2000  
SN74HC573AQDWRQ1 HC573AQ  
SN74HC573AQPWRQ1 HC573AQ  
−40°C to 125°C  
TSSOP − PW  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢍꢢ  
Copyright 2004, Texas Instruments Incorporated  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
ꢠꢢ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74HC573AQPWRQ1 替代型号

型号 品牌 替代类型 描述 数据表
SN74HC573AQPWRG4Q1 TI

完全替代

汽车类具有三态输出的八路透明 D 类锁存器 | PW | 20 | -40 to 125
SN74HC573APWT TI

类似代替

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74HC573APWR TI

类似代替

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

与SN74HC573AQPWRQ1相关器件

型号 品牌 获取价格 描述 数据表
SN74HC573DW-00 TI

获取价格

HC/UH SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
SN74HC573N TI

获取价格

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74HC573N-00 TI

获取价格

HC/UH SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20
SN74HC573N1 TI

获取价格

IC,LATCH,SINGLE,8-BIT,HC-CMOS,DIP,20PIN,PLASTIC
SN74HC573N-10 TI

获取价格

HC/UH SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20
SN74HC573NP1 TI

获取价格

IC,LATCH,SINGLE,8-BIT,HC-CMOS,DIP,20PIN,PLASTIC
SN74HC574 TI

获取价格

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74HC574APWR TI

获取价格

暂无描述
SN74HC574DBR TI

获取价格

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74HC574DBRE4 TI

获取价格

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS