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SN74HC166AIDREP PDF预览

SN74HC166AIDREP

更新时间: 2024-09-15 12:22:03
品牌 Logo 应用领域
德州仪器 - TI 移位寄存器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
13页 384K
描述
8-BIT PARALLEL-LOAD SHIFT REGISTER

SN74HC166AIDREP 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:GREEN, PLASTIC, SOIC-16针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:8 weeks
风险等级:0.68Is Samacsys:N
其他特性:SISO OPERATION ALSO AVAILABLE计数方向:RIGHT
系列:HC/UHJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:9.9 mm
负载电容(CL):50 pF逻辑集成电路类型:PARALLEL IN SERIAL OUT
最大频率@ Nom-Sup:25000000 Hz最大I(ol):0.004 A
湿度敏感等级:1位数:8
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TR峰值回流温度(摄氏度):260
电源:2/6 V最大电源电流(ICC):0.08 mA
Prop。Delay @ Nom-Sup:30 ns传播延迟(tpd):190 ns
认证状态:Not Qualified施密特触发器:No
座面最大高度:1.75 mm子类别:Shift Register
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:3.91 mm最小 fmax:29 MHz
Base Number Matches:1

SN74HC166AIDREP 数据手册

 浏览型号SN74HC166AIDREP的Datasheet PDF文件第2页浏览型号SN74HC166AIDREP的Datasheet PDF文件第3页浏览型号SN74HC166AIDREP的Datasheet PDF文件第4页浏览型号SN74HC166AIDREP的Datasheet PDF文件第5页浏览型号SN74HC166AIDREP的Datasheet PDF文件第6页浏览型号SN74HC166AIDREP的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢇꢇ ꢈꢉ ꢊꢋ  
ꢌ ꢉꢍꢎ ꢏ ꢋꢈꢐꢈ ꢑꢑ ꢊꢑ ꢉꢑ ꢒ ꢈꢓ ꢀꢄꢎ ꢔ ꢏ ꢐꢊ ꢕ ꢎꢀ ꢏꢊ ꢐ  
SCLS559 − JANUARY 2004  
D
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
D
D
D
D
4-mA Output Drive at 5 V  
Low Input Current of 1 µA Max  
Synchronous Load  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
Direct Overriding Clear  
Parallel-to-Serial Conversion  
D
D
D
D
D
D
Enhanced Product-Change Notification  
Qualification Pedigree  
D OR PW PACKAGE  
(TOP VIEW)  
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive Up To 10 LSTTL Loads  
SER  
V
CC  
SH/LD  
H
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Low Power Consumption, 80-µA Max I  
A
CC  
B
C
Typical t = 13 ns  
pd  
Q
H
G
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
D
CLK INH  
CLK  
F
E
GND  
CLR  
description/ordering information  
This parallel-in or serial-in, serial-out register features gated clock (CLK, CLK INH) inputs and an overriding  
clear (CLR) input. The parallel-in or serial-in modes are established by the shift/load (SH/LD) input. When high,  
SH/LD enables the serial (SER) data input and couples the eight flip-flops for serial shifting with each clock  
(CLK) pulse. When low, the parallel (broadside) data inputs are enabled, and synchronous loading occurs on  
the next clock pulse. During parallel loading, serial data flow is inhibited. Clocking is accomplished on the  
low-to-high-level edge of CLK through a 2-input positive-NOR gate, permitting one input to be used as a  
clock-enable or clock-inhibit function. Holding either CLK or CLK INH high inhibits clocking; holding either low  
enables the other clock input. This allows the system clock to be free running, and the register can be stopped  
on command with the other clock input. CLK INH should be changed to the high level only when CLK is high.  
CLR overrides all other inputs, including CLK, and resets all flip-flops to zero.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
SOIC − D  
Tape and reel  
Tape and reel  
SN74HC166AIDREP  
SN74HC166AIPWREP  
SHC166IEP  
SHC166IEP  
−40°C to 85°C  
§
TSSOP − PW  
§
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Product Preview  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢏꢢ  
Copyright 2004, Texas Instruments Incorporated  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74HC166AIDREP 替代型号

型号 品牌 替代类型 描述 数据表
V62/04690-01XE TI

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