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SN74BCT374NSR PDF预览

SN74BCT374NSR

更新时间： 2024-09-16 05:17:39
品牌 Logo 应用领域
德州仪器 - TI 锁存器输出元件
页数 文件大小 规格书
17页 566K
描述
OCTAL EDGE-TRIGGERED D-TYPE LATCHES WITH 3-STATE OUTPUTS

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SN74BCT374NSR 数据手册

 浏览型号SN74BCT374NSR的Datasheet PDF文件第2页浏览型号SN74BCT374NSR的Datasheet PDF文件第3页浏览型号SN74BCT374NSR的Datasheet PDF文件第4页浏览型号SN74BCT374NSR的Datasheet PDF文件第5页浏览型号SN74BCT374NSR的Datasheet PDF文件第6页浏览型号SN74BCT374NSR的Datasheet PDF文件第7页 
SN54BCT374, SN74BCT374  
OCTAL EDGE-TRIGGERED D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SCBS019C – SEPTEMBER 1988 – REVISED MARCH 2003  
Operating Voltage Range of 4.5 V to 5.5 V  
State-of-the-Art BiCMOS Design  
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
Significantly Reduces I  
ESD Protection Exceeds JESD 22  
CCZ  
– 2000-V Human-Body Model (A114-A)  
Full Parallel Access for Loading  
Buffered Control Inputs  
SN54BCT374 . . . J OR W PACKAGE  
SN74BCT374 . . . DW, N, OR NS PACKAGE  
(TOP VIEW)  
SN54BCT374 . . . FK PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
8Q  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
CLK  
3
2
1
20 19  
18  
8D  
7D  
7Q  
6Q  
6D  
2D  
2Q  
3Q  
3D  
4D  
4
5
6
7
8
17  
16  
15  
14  
9 10 11 12 13  
GND  
description/ordering information  
These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively  
low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional  
bus drivers, and working registers.  
The eight flip-flops of the ’BCT374 devices are edge-triggered D-type flip-flops. On the positive transition of the  
clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines  
significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without  
need for interface or pullup components. The output-enable (OE) input does not affect internal operations of  
the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance  
state.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP – N  
Tube  
SN74BCT374N  
SN74BCT374N  
Tube  
SN74BCT374DW  
SN74BCT374DWR  
SN74BCT374NSR  
SNJ54BCT374J  
SNJ54BCT374W  
SNJ54BCT374FK  
0°C to 70°C  
SOIC – DW  
BCT374  
Tape and reel  
Tape and reel  
Tube  
SOP – NS  
CDIP – J  
BCT374  
SNJ54BCT374J  
SNJ54BCT374W  
SNJ54BCT374FK  
–55°C to 125°C  
CFP – W  
LCCC – FK  
Tube  
Tube  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...17

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SN74BCT374NSR 替代型号

型号 品牌 替代类型 描述 数据表
SN74BCT374NE4 TI

类似代替

 OCTAL EDGE-TRIGGERED D-TYPE LATCHES WITH 3-STATE OUTPUTS
5962-9051601M2A TI

类似代替

 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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