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SN74AVC20T245GQLR PDF预览

SN74AVC20T245GQLR

更新时间: 2024-11-05 22:16:19
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
19页 433K
描述
20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SN74AVC20T245GQLR 数据手册

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ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢇꢃꢊ  
ꢇ ꢈ ꢋꢌꢍ ꢉ ꢎꢏꢄ ꢐꢋꢀ ꢏꢑꢑꢐꢒ ꢌꢏꢀ ꢉ ꢓꢄꢁꢀ ꢆꢔ ꢍ ꢅꢔ ꢓ  
SCES566F − MAY 2004 − REVISED APRIL 2005  
DGG OR DGV PACKAGE  
(TOP VIEW)  
D
D
Control Inputs V /V Levels are  
IH IL  
Referenced to V  
Voltage  
CCA  
V
Isolation Feature − If Either V  
Input  
CC  
CC  
1
1DIR  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
Is at GND, Both Ports Are in the  
High-Impedance State  
2
1B1  
1B2  
3
D
D
Overvoltage-Tolerant Inputs/Outputs Allow  
Mixed-Voltage-Mode Data Communications  
4
GND  
1B3  
5
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.2-V to  
3.6-V Power-Supply Range  
6
1B4  
7
V
V
CCB  
1B5  
CCA  
8
1A5  
1A6  
1A7  
GND  
1A8  
1A9  
1A10  
2A1  
2A2  
2A3  
GND  
2A4  
2A5  
2A6  
9
1B6  
1B7  
GND  
1B8  
1B9  
1B10  
2B1  
2B2  
2B3  
GND  
2B4  
2B5  
2B6  
D
I
Supports Partial-Power-Down Mode  
off  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
Operation  
D
I/Os Are 4.6-V Tolerant  
D
Max Data Rates  
− 380 Mbps (1.8-V to 3.3-V Translation)  
− 260 Mbps (< 1.8-V to 3.3-V Translation)  
− 260 Mbps (Translate to 2.5 V)  
− 210 Mbps (Translate to 1.8 V)  
− 120 Mbps (Translate to 1.5 V)  
− 100 Mbps (Translate to 1.2 V)  
D
D
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
− 8000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
V
V
CCB  
2B7  
CCA  
2A7  
2A8  
GND  
2A9  
2A10  
2OE  
2B8  
GND  
2B9  
2B10  
2DIR  
− 1000-V Charged-Device Model (C101)  
description/ordering information  
This 20-bit noninverting bus transceiver uses two  
separate configurable power-supply rails.  
The SN74AVC20T245 is optimized to operate with V  
/V  
set at 1.4 V to 3.6 V. It is operational with  
CCA CCB  
V
/V  
as low as 1.2 V. The A port is designed to track V  
. V  
accepts any supply voltage from  
CCA CCB  
CCA CCA  
1.2 V to 3.6 V. The B port is designed to track V  
. V  
accepts any supply voltage from 1.2 V to 3.6 V. This  
CCB CCB  
allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V  
voltage nodes.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
TSSOP − DGG  
TVSOP − DGV  
VFBGA − GQL  
Tape and reel SN74AVC20T245DGGR  
Tape and reel SN74AVC20T245DGVR  
AVC20T245  
WG245  
−40°C to 85°C  
SN74AVC20T245GQLR  
Tape and reel  
WG245  
VFBGA − ZQL (Pb-free)  
SN74AVC20T245ZQLR  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available  
at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢉꢦ  
Copyright 2005, Texas Instruments Incorporated  
ꢢ ꢦ ꢣ ꢢꢛ ꢜꢰ ꢞꢝ ꢡ ꢩꢩ ꢧꢡ ꢟ ꢡ ꢠ ꢦ ꢢ ꢦ ꢟ ꢣ ꢫ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74AVC20T245GQLR 替代型号

型号 品牌 替代类型 描述 数据表
74AVC20T245DGVRE4 TI

完全替代

20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPU
74AVC20T245DGGRE4 TI

完全替代

20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPU
SN74AVC20T245DGVR TI

类似代替

20 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPU

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