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SN74ALVCH244PWE4 PDF预览

SN74ALVCH244PWE4

更新时间： 2024-11-21 05:29:35
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德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
16页 321K
描述
OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

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SN74ALVCH244PWE4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP, TSSOP20,.25针数：20
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.17控制类型：ENABLE LOW
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G20
JESD-609代码：e4长度：6.5 mm
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.024 A
湿度敏感等级：1位数：4
功能数量：2端口数量：2
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP20,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：TUBE峰值回流温度（摄氏度）：260
电源：3.3 VProp。Delay @ Nom-Sup：2.8 ns
传播延迟（tpd）：3.1 ns认证状态：Not Qualified
座面最大高度：1.2 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：4.4 mm
Base Number Matches：1

SN74ALVCH244PWE4 数据手册

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SN74ALVCH244  
OCTAL BUFFER/DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES112F–JULY 1997–REVISED AUGUST 2004  
FEATURES  
DGV, DW, NS, OR PW PACKAGE  
(TOP VIEW)  
•
•
•
•
Operates From 1.65 V to 3.6 V  
Max tpd of 2.8 ns at 3.3 V  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
V
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
CC  
±24-mA Output Drive at 3.3 V  
2OE  
1Y1  
2A4  
1Y2  
2A3  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
•
•
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
14 1Y3  
13 2A2  
12  
11  
1Y4  
2A1  
GND 10  
DESCRIPTION/ORDERING INFORMATION  
This octal buffer/line driver is designed for 1.65-V to 3.6-V VCC operation.  
The SN74ALVCH244 is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is  
low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the  
high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors  
with the bus-hold circuitry is not recommended.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74ALVCH244DW  
TOP-SIDE MARKING  
ALVCH244  
ALVCH244  
VB244  
Tube  
SOIC - DW  
SOP - NS  
Tape and reel  
Tape and reel  
Tube  
SN74ALVCH244DWR  
SN74ALVCH244NSR  
SN74ALVCH244PW  
-40°C to 85°C  
TSSOP - PW  
TVSOP - DGV  
Tape and reel  
Tape and reel  
SN74ALVCH244PWR  
SN74ALVCH244DGVR  
VB244  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
FUNCTION TABLE  
(each buffer)  
INPUTS  
OUTPUT  
Y
OE  
L
A
H
L
H
L
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1997–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...16

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