Datasheet > SN74ALVCH32245

SN74ALVCH32245

更新时间： 2024-09-15 23:09:43

品牌	Logo	应用领域
德州仪器 - TI		总线收发器输出元件
页数	文件大小	规格书
8页	125K
描述
32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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SN74ALVCH32245 数据手册

SN74ALVCH32245

32-BIT BUS TRANSCEIVER

WITH 3-STATE OUTPUTS

SCES282 – OCTOBER 1999

Member of the Texas Instruments

Widebus+ Family

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

EPIC (Enhanced-Performance Implanted

CMOS) Submicron Process

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

– 1000-V Charged-Device Model (C101)

Packaged in Plastic Fine-Pitch Ball Grid

Array Package

description

This 32-bit noninverting bus transceiver is designed for 1.65-V to 3.6-V V

operation.

The SN74ALVCH32245 is designed for asynchronous communication between data buses. The

control-function implementation minimizes external timing requirements.

This device can be used as four 8-bit transceivers, two 16-bit transceivers, or one 32-bit transceiver. It allows

data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at

the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the

buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH32245 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

(each 8-bit section)

INPUTS

OPERATION

DIR

B data to A bus

A data to B bus

Isolation

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC and Widebus+ are trademarks of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7 8

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与SN74ALVCH32245相关器件

型号	品牌	获取价格	描述	数据表
SN74ALVCH32245GKE	TI	获取价格	32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVCH32245KR	TI	获取价格	32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVCH32374	TI	获取价格	32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH32374GKE	TI	获取价格	32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74ALVCH32501	TI	获取价格	36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVCH32501_13	TI	获取价格	36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVCH32501GFK	TI	获取价格	ALVC/VCX/A SERIES, DUAL 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PBGA114, FINE PITCH, P
SN74ALVCH32501GKE	TI	获取价格	36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVCH32501GKF	TI	获取价格	暂无描述
SN74ALVCH32501GKFR	TI	获取价格	ALVC/VCX/A SERIES, DUAL 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PBGA114, PLASTIC, LFBG

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