5秒后页面跳转
SN74ALS563BN3 PDF预览

SN74ALS563BN3

更新时间: 2024-11-02 15:52:07
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
18页 1062K
描述
Octal D-Type Transparent Latches With 3-State Outputs 20-PDIP 0 to 70

SN74ALS563BN3 技术参数

是否无铅: 含铅生命周期:Obsolete
零件包装代码:DIP包装说明:DIP,
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.49
系列:ALSJESD-30 代码:R-PDIP-T20
长度:25.4 mm逻辑集成电路类型:BUS DRIVER
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
传播延迟(tpd):22 ns认证状态:Not Qualified
座面最大高度:5.08 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mmBase Number Matches:1

SN74ALS563BN3 数据手册

 浏览型号SN74ALS563BN3的Datasheet PDF文件第2页浏览型号SN74ALS563BN3的Datasheet PDF文件第3页浏览型号SN74ALS563BN3的Datasheet PDF文件第4页浏览型号SN74ALS563BN3的Datasheet PDF文件第5页浏览型号SN74ALS563BN3的Datasheet PDF文件第6页浏览型号SN74ALS563BN3的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅ ꢀ ꢂꢆ ꢇ ꢈꢉ ꢀꢁꢊ ꢃ ꢄ ꢅꢀ ꢂꢆ ꢇꢈ  
ꢋ ꢌꢍꢄꢅ ꢎꢏꢍ ꢐꢑ ꢒ ꢍ ꢓꢄꢁꢀ ꢑꢄꢓꢒ ꢁꢍ ꢅꢄꢍꢌ ꢔ ꢒꢀ  
ꢕ ꢖꢍ ꢔ ꢇ ꢏꢀꢍꢄꢍ ꢒ ꢋ ꢗꢍ ꢑꢗ ꢍꢀ  
SDAS163B − DECEMBER 1982 − REVISED NOVEMBER 2004  
SN54ALS563B . . . J OR W PACKAGE  
SN74ALS563B . . . DW, N, OR NS PACKAGE  
(TOP VIEW)  
D 3-State Buffer-Type Outputs Drive Bus  
Lines Directly  
D Bus-Structured Pinout  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
19 1Q  
1
2
3
4
5
6
7
8
9
10  
20  
description/ordering information  
18 2Q  
These 8-bit D-type transparent latches feature  
3-state outputs designed specifically for driving  
highly capacitive or relatively low-impedance  
loads. They are particularly suitable for  
implementing buffer registers, I/O ports,  
bidirectional bus drivers, and working registers.  
17  
16  
15  
14  
13  
12  
11  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
LE  
While the latch-enable (LE) input is high, the Q  
outputs follow the complements of data (D) inputs.  
When LE is taken low, the outputs are latched at  
the inverse of the levels set up at the D inputs.  
GND  
SN54ALS563B . . . FK PACKAGE  
(TOP VIEW)  
A buffered output-enable (OE) input places the  
eight outputs in either a normal logic state (high or  
low logic levels) or a high-impedance state. In the  
high-impedance state, the outputs neither load  
nor drive the bus lines significantly. The  
high-impedance state and increased high logic  
level provide the capability to drive bus lines  
without interface or pullup components.  
3
2
1
20 19  
18  
2Q  
3Q  
4Q  
5Q  
6Q  
3D  
4D  
5D  
6D  
7D  
4
5
6
7
8
17  
16  
15  
14  
9 10 11 12 13  
OE does not affect internal operations of the  
latches. Old data can be retained or new data can  
be entered while the outputs are in the  
high-impedance state.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
T
A
PACKAGE  
TOP-SIDE MARKING  
PDIP − N  
Tube of 20  
Tube of 25  
Reel of 2000  
Reel of 2000  
Tube of 20  
Tube of 85  
Tube of 55  
SN74ALS563BN  
SN74ALS563BN  
SN74ALS563BDW  
SN74ALS563BDWR  
SN74ALS563BNSR  
SNJ54ALS563BJ  
SNJ54ALS563BW  
SNJ54ALS563BFK  
0°C to 70°C  
SOIC − DW  
ALS563B  
SOP − NS  
CDIP − J  
ALS563B  
SNJ54ALS563BJ  
SNJ54ALS563BW  
SNJ54ALS563BFK  
−55°C to 125°C  
CFP − W  
LCCC − FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available  
at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢑꢓ ꢋ ꢎꢗ ꢌ ꢍꢖ ꢋ ꢁ ꢎ ꢄꢍꢄ ꢘꢙ ꢚ ꢛꢜ ꢝ ꢞꢟ ꢘꢛꢙ ꢘꢠ ꢡꢢ ꢜ ꢜ ꢣꢙꢟ ꢞꢠ ꢛꢚ ꢤꢢꢥ ꢦꢘꢡ ꢞꢟ ꢘꢛꢙ ꢧꢞ ꢟꢣ ꢨ  
ꢑꢜ ꢛ ꢧꢢꢡ ꢟ ꢠ ꢡ ꢛꢙ ꢚꢛ ꢜ ꢝ ꢟ ꢛ ꢠ ꢤꢣ ꢡ ꢘꢚ ꢘꢡꢞ ꢟꢘ ꢛꢙꢠ ꢤꢣ ꢜ ꢟꢩ ꢣ ꢟꢣ ꢜ ꢝꢠ ꢛꢚ ꢍꢣꢪ ꢞꢠ ꢖꢙꢠ ꢟꢜ ꢢꢝ ꢣꢙꢟ ꢠ  
ꢠ ꢟ ꢞ ꢙꢧ ꢞ ꢜꢧ ꢫ ꢞ ꢜꢜ ꢞ ꢙ ꢟꢬꢨ ꢑꢜ ꢛ ꢧꢢꢡ ꢟꢘꢛꢙ ꢤꢜ ꢛꢡ ꢣꢠ ꢠꢘ ꢙꢭ ꢧꢛꢣ ꢠ ꢙꢛꢟ ꢙꢣ ꢡꢣ ꢠꢠ ꢞꢜ ꢘꢦ ꢬ ꢘꢙꢡ ꢦꢢꢧ ꢣ  
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
Copyright 2004, Texas Instruments Incorporated  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74ALS563BN3 替代型号

型号 品牌 替代类型 描述 数据表
SN74ALS563BNSR TI

完全替代

具有三态输出的八路 D 类透明锁存器 | NS | 20 | 0 to 70
SN74ALS563BNSRG4 TI

完全替代

具有三态输出的八路 D 类透明锁存器 | NS | 20 | 0 to 70
5962-8870001RA TI

完全替代

具有三态输出的八路 D 类透明锁存器 | J | 20 | -55 to 125

与SN74ALS563BN3相关器件

型号 品牌 获取价格 描述 数据表
SN74ALS563BNE4 TI

获取价格

ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDIP20, ROHS COMPLIANT, PLASTIC, MS-001AD, DIP-
SN74ALS563BNSR TI

获取价格

具有三态输出的八路 D 类透明锁存器 | NS | 20 | 0 to 70
SN74ALS563BNSRE4 TI

获取价格

ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20, GREEN, PLASTIC, SOP-20
SN74ALS563BNSRG4 TI

获取价格

具有三态输出的八路 D 类透明锁存器 | NS | 20 | 0 to 70
SN74ALS563FN3 TI

获取价格

IC IC,LATCH,SINGLE,8-BIT,ALS-TTL,LDCC,20PIN,PLASTIC, FF/Latch
SN74ALS563J TI

获取价格

IC,LATCH,SINGLE,8-BIT,ALS-TTL,DIP,20PIN,CERAMIC
SN74ALS563JP4 TI

获取价格

IC IC,LATCH,SINGLE,8-BIT,ALS-TTL,DIP,20PIN,CERAMIC, FF/Latch
SN74ALS563N TI

获取价格

IC,LATCH,SINGLE,8-BIT,ALS-TTL,DIP,20PIN,PLASTIC
SN74ALS563N1 TI

获取价格

IC,LATCH,SINGLE,8-BIT,ALS-TTL,DIP,20PIN,PLASTIC
SN74ALS563N-10 TI

获取价格

ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDIP20