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SN74ALS29862DWR PDF预览

SN74ALS29862DWR

更新时间: 2024-11-19 15:52:07
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
8页 132K
描述
ALS SERIES, 10-BIT TRANSCEIVER, INVERTED OUTPUT, PDSO24, PLASTIC, SO-24

SN74ALS29862DWR 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:PLASTIC, SO-24
针数:24Reach Compliance Code:not_compliant
风险等级:5.92Is Samacsys:N
其他特性:INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONAL系列:ALS
JESD-30 代码:R-PDSO-G24长度:15.4 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS TRANSCEIVER
位数:10功能数量:1
端口数量:2端子数量:24
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED最大电源电流(ICC):65 mA
传播延迟(tpd):14 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A宽度:7.5 mm
Base Number Matches:1

SN74ALS29862DWR 数据手册

 浏览型号SN74ALS29862DWR的Datasheet PDF文件第2页浏览型号SN74ALS29862DWR的Datasheet PDF文件第3页浏览型号SN74ALS29862DWR的Datasheet PDF文件第4页浏览型号SN74ALS29862DWR的Datasheet PDF文件第5页浏览型号SN74ALS29862DWR的Datasheet PDF文件第6页浏览型号SN74ALS29862DWR的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅ ꢀ ꢆꢇ ꢈ ꢉ ꢊ ꢋꢌ ꢀꢁꢂ ꢃ ꢄ ꢅꢀ ꢆꢇ ꢈꢉ ꢆ  
ꢊ ꢍ ꢎꢏꢐ ꢑꢌ ꢏꢒꢀꢌ ꢑ ꢓꢄꢁꢀ ꢔꢕꢐꢖ ꢕꢓꢀꢌ ꢗꢐ ꢑ ꢘꢌꢙ ꢎꢀ ꢑꢄꢑ ꢕꢌ ꢚ ꢒꢑ ꢛꢒ ꢑꢀ  
SDAS097B − D2915, JANUARY 1986 − REVISED AUGUST 1988  
DW OR NT PACKAGE  
(TOP VIEW)  
Functionally Equivalent to AM29861 and  
AM29862  
Choice of True or Inverting Logic  
Power-Up High-Impedance State  
Package Options include Plastic Small  
GBA  
A1  
V
CC  
1
24  
23  
22  
21  
20  
B1  
B2  
B3  
B4  
2
A2  
3
A3  
4
Outline Packages, Plastic Chip Carriers, and  
Standard Plastic DIPs  
A4  
5
A5  
6
19 B5  
7
18  
description  
A6  
B6  
8
17  
16  
15  
14  
13  
A7  
B7  
These 10-bit bus transceivers are designed for  
asynchronous two-way communication between  
data buses. The control function implementation  
allows for maximum flexibility in timing.  
9
A8  
B8  
10  
11  
12  
A9  
B9  
A10  
GND  
B10  
GAB  
These devices allow data transmission from the A  
bus to the B bus or from the B bus to the A bus  
depending upon the logic levels at the enable  
inputs (GBA and GAB).  
FN PACKAGE  
(TOP VIEW)  
The enable inputs can be used to disable the  
device so that the buses are effectively isolated.  
4
5
3
2 1 28 27 26  
25  
B3  
B4  
B5  
NC  
B6  
B7  
B8  
A3  
A4  
A5  
NC  
A6  
A7  
A8  
The SN74’ family is characterized for operation  
from 0°C to 70°C.  
6
24  
23  
22  
21  
20  
19  
7
8
FUNCTION TABLE  
9
10  
11  
INPUTS  
OPERATION  
ALS29861  
ALS29862  
GAB GBA  
12 13 14 15 16 17 18  
L
H
H
L
H
L
A to B  
B to A  
A to B  
B to A  
H
L
Isolation  
Latch A and B  
(A = B)  
Isolation  
Latch A and B  
(A = B)  
NC − No internal connection  
ꢛꢓ ꢚ ꢝꢒ ꢔ ꢑꢐ ꢚꢁ ꢝ ꢄꢑꢄ ꢞꢟ ꢠ ꢡꢢ ꢣꢤ ꢥꢞꢡ ꢟ ꢞꢦ ꢧꢨ ꢢ ꢢ ꢩꢟꢥ ꢤꢦ ꢡꢠ ꢪꢨꢫ ꢬꢞꢧ ꢤꢥ ꢞꢡꢟ ꢭꢤ ꢥꢩ ꢮ  
ꢛꢢ ꢡ ꢭꢨꢧ ꢥ ꢦ ꢧ ꢡꢟ ꢠꢡ ꢢ ꢣ ꢥ ꢡ ꢦ ꢪꢩ ꢧ ꢞꢠ ꢞꢧꢤ ꢥꢞ ꢡꢟꢦ ꢪꢩ ꢢ ꢥꢯ ꢩ ꢥꢩ ꢢ ꢣꢦ ꢡꢠ ꢑꢩꢰ ꢤꢦ ꢐꢟꢦ ꢥꢢ ꢨꢣ ꢩꢟꢥ ꢦ  
ꢦ ꢥ ꢤ ꢟꢭ ꢤ ꢢꢭ ꢱ ꢤ ꢢꢢ ꢤ ꢟ ꢥꢲꢮ ꢛꢢ ꢡ ꢭꢨꢧ ꢥꢞꢡꢟ ꢪꢢ ꢡꢧ ꢩꢦ ꢦꢞ ꢟꢳ ꢭꢡꢩ ꢦ ꢟꢡꢥ ꢟꢩ ꢧꢩ ꢦꢦ ꢤꢢ ꢞꢬ ꢲ ꢞꢟꢧ ꢬꢨꢭ ꢩ  
ꢥ ꢩ ꢦ ꢥꢞ ꢟꢳ ꢡꢠ ꢤ ꢬꢬ ꢪꢤ ꢢ ꢤ ꢣ ꢩ ꢥ ꢩ ꢢ ꢦ ꢮ  
Copyright 1988, Texas Instruments Incorporated  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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