SN54ALS259, SN74ALS259
8-BIT ADDRESSABLE LATCHES
SDAS217A – DECEMBER 1982 – REVISED DECEMBER 1994
SN54ALS259 . . . J PACKAGE
SN74ALS259 . . . D OR N PACKAGE
(TOP VIEW)
• 8-Bit Parallel-Out Storage Register
Performs Serial-to-Parallel Conversion With
Storage
• Asynchronous Parallel Clear
• Active-High Decoder
• Enable/Disable Input Simplifies Expansion
• Expandable for n-Bit Applications
• Four Distinct Functional Modes
• Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
S0
S1
S2
Q0
Q1
Q2
Q3
GND
V
CC
CLR
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
G
D
Q7
Q6
Q5
Q4
SN54ALS259 . . . FK PACKAGE
(TOP VIEW)
description
These 8-bit addressable latches are designed for
general-purpose storage applications in digital
systems. Specific uses include working registers,
serial-holding registers, and active-high decoders
or demultiplexers. They are multifunctional
devices capable of storing single-line data in eight
addressablelatchesandbeinga1-of-8decoderor
demultiplexer with active-high outputs.
3
2
1 20 19
18
S2
Q0
NC
Q1
Q2
G
4
5
6
7
8
17
16
15
14
D
NC
Q7
Q6
9 10 11 12 13
Four distinct modes of operation are selectable by
controlling the clear (CLR) and enable (G) inputs
as shown in the function table. In the
addressable-latch mode, data at the data-in
terminal is written into the addressed latch. The
NC – No internal connection
addressed latch follows the data input with all unaddressed latches remaining in their previous states. In the
memory mode, all latches remain in their previous states and are unaffected by the data or address inputs. To
eliminate the possibility of entering erroneous data in the latches, G should be held high (inactive) while the
address lines are changing. In the 1-of-8 decoding or demultiplexing mode, the addressed output follows the
level of the D input with all other outputs low. In the clear mode, all outputs are low and unaffected by the address
and data inputs.
The SN54ALS259 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74ALS259 is characterized for operation from 0°C to 70°C.
Function Tables
FUNCTION
OUTPUT OF
EACH
INPUTS
ADDRESSED OTHER
FUNCTION
CLR
G
LATCH
OUTPUT
H
H
L
L
H
L
D
Q
Q
Addressable latch
Memory
iO
iO
Q
iO
D
L
8-line demultiplexer
Clear
L
H
L
L
D = the level at the data input.
= the level of Q (i = Q, 1, . . . 7 as appropriate) before the indicated
Q
iO
i
steady-state input conditions were established.
Copyright 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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