ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢇꢈ ꢉ ꢊꢋ
ꢀꢌ ꢁꢉ ꢍ ꢎ ꢋ ꢏꢌꢁ ꢐꢑꢇ ꢐꢒ ꢀꢌ ꢇ ꢌꢓꢎꢏ ꢒ ꢔ ꢉ ꢄꢇꢎ
SCLS320N − MARCH 1996 − REVISED JUNE 2005
D
D
D
D
D
Operating Range of 4.5 V to 5.5 V
D
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Max t of 8 ns at 5 V
pd
Low Power Consumption, 10-µA Max I
8-mA Output Drive at 5 V
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
CC
Inputs Are TTL-Voltage Compatible
− 1000-V Charged-Device Model (C101)
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
DRL PACKAGE
(TOP VIEW)
1
2
3
5
4
A
B
V
Y
CC
1
2
3
5
A
B
V
Y
A
B
V
Y
1
2
3
5
CC
CC
4
GND
4
GND
GND
See mechanical drawings for dimensions.
description/ordering information
The SN74AHCT1G32 is a single 2-input positive-OR gate. The device performs the Boolean function
Y + A ) B or Y + A • B in positive logic.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
‡
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
Reel of 4000
SN74AHCT1G32DBVR
SN74AHCT1G32DBVT
SN74AHCT1G32DCKR
SN74AHCT1G32DCKT
SN74AHCT1G32DRLR
SOT (SOT-23) − DBV
B32_
−40°C to 85°C
SOT (SC-70) − DCK
BG_
BG_
SOT (SOT-553) − DRL
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUTS
OUTPUT
Y
A
B
X
H
L
H
X
L
H
H
L
logic diagram (positive logic)
1
2
A
B
4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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