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SN74AHCT1G32DBVTE4 PDF预览

SN74AHCT1G32DBVTE4

更新时间: 2024-11-18 19:07:39
品牌 Logo 应用领域
德州仪器 - TI 输入元件光电二极管逻辑集成电路
页数 文件大小 规格书
15页 931K
描述
AHCT/VHCT/VT SERIES, 2-INPUT OR GATE, PDSO5, GREEN, PLASTIC, SOT-23, 5 PIN

SN74AHCT1G32DBVTE4 技术参数

生命周期:Obsolete零件包装代码:SOT-23
包装说明:LSSOP, TSOP5/6,.11,37针数:5
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.67系列:AHCT/VHCT/VT
JESD-30 代码:R-PDSO-G5JESD-609代码:e4
长度:2.9 mm逻辑集成电路类型:OR GATE
功能数量:1输入次数:2
端子数量:5最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LSSOP封装等效代码:TSOP5/6,.11,37
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
传播延迟(tpd):9 ns认证状态:Not Qualified
座面最大高度:1.45 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:0.95 mm
端子位置:DUAL宽度:1.6 mm
Base Number Matches:1

SN74AHCT1G32DBVTE4 数据手册

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ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢇꢈ ꢉ ꢊꢋ  
ꢀꢌ ꢁꢉ ꢍ ꢎ ꢋ ꢏꢌꢁ ꢐꢑꢇ ꢐꢒ ꢀꢌ ꢇ ꢌꢓꢎꢏ ꢒ ꢔ ꢉ ꢄꢇꢎ  
SCLS320N − MARCH 1996 − REVISED JUNE 2005  
D
D
D
D
D
Operating Range of 4.5 V to 5.5 V  
D
D
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Max t of 8 ns at 5 V  
pd  
Low Power Consumption, 10-µA Max I  
8-mA Output Drive at 5 V  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
CC  
Inputs Are TTL-Voltage Compatible  
− 1000-V Charged-Device Model (C101)  
DBV PACKAGE  
(TOP VIEW)  
DCK PACKAGE  
(TOP VIEW)  
DRL PACKAGE  
(TOP VIEW)  
1
2
3
5
4
A
B
V
Y
CC  
1
2
3
5
A
B
V
Y
A
B
V
Y
1
2
3
5
CC  
CC  
4
GND  
4
GND  
GND  
See mechanical drawings for dimensions.  
description/ordering information  
The SN74AHCT1G32 is a single 2-input positive-OR gate. The device performs the Boolean function  
Y + A ) B or Y + A B in positive logic.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
Reel of 3000  
Reel of 250  
Reel of 3000  
Reel of 250  
Reel of 4000  
SN74AHCT1G32DBVR  
SN74AHCT1G32DBVT  
SN74AHCT1G32DCKR  
SN74AHCT1G32DCKT  
SN74AHCT1G32DRLR  
SOT (SOT-23) − DBV  
B32_  
−40°C to 85°C  
SOT (SC-70) − DCK  
BG_  
BG_  
SOT (SOT-553) − DRL  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
The actual top-side marking has one additional character that designates the assembly/test site.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
A
B
X
H
L
H
X
L
H
H
L
logic diagram (positive logic)  
1
2
A
B
4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢇꢡ  
Copyright 2005, Texas Instruments Incorporated  
ꢝ ꢡ ꢞ ꢝꢖ ꢗꢫ ꢙꢘ ꢜ ꢤꢤ ꢢꢜ ꢚ ꢜ ꢛ ꢡ ꢝ ꢡ ꢚ ꢞ ꢦ  
ꢜꢚ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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