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SN74ACT7814 PDF预览

SN74ACT7814

更新时间: 2024-11-15 23:03:11
品牌 Logo 应用领域
德州仪器 - TI 存储
页数 文件大小 规格书
11页 148K
描述
64 】 18 STROBED FIRST-IN, FIRST-OUT MEMORY

SN74ACT7814 数据手册

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SN74ACT7814  
64 × 18 STROBED FIRST-IN, FIRST-OUT MEMORY  
SCAS209C – APRIL 1992 – REVISED APRIL 1998  
DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
Load Clock and Unload Clock Can Be  
Asynchronous or Coincident  
RESET  
D17  
D16  
D15  
D14  
D13  
D12  
D11  
OE  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
Q17  
Q16  
Q15  
GND  
Q14  
2
64 Words by 18 Bits  
3
Low-Power Advanced CMOS Technology  
Full, Empty, and Half-Full Flags  
4
5
6
Programmable Almost-Full/Almost-Empty  
Flag  
V
7
CC  
Q13  
Q12  
Q11  
Q10  
Q9  
8
Fast Access Times of 15 ns With a 50-pF  
Load and All Data Outputs Switching  
Simultaneously  
D10  
9
V
10  
11  
12  
13  
14  
CC  
D9  
D8  
GND  
D7  
Data Rates up to 50 MHz  
3-State Outputs  
GND  
Q8  
Pin-to-Pin Compatible With SN74ACT7804  
and SN74ACT7806  
D6 15  
42 Q7  
D5  
D4  
Q6  
Q5  
16  
17  
41  
40  
39  
Packaged in Shrink Small-Outline 300-mil  
Package Using 25-mil Center-to-Center  
Spacing  
D3 18  
D2 19  
V
CC  
38 Q4  
37 Q3  
D1 20  
description  
36 Q2  
D0 21  
A FIFO memory is a storage device that allows  
data to be written into and read from its array at  
independent data rates. The SN74ACT7814 is a  
64-word by 18-bit FIFO for high speed and fast  
access times. It processes data at rates up to  
50 MHz and access times of 15 ns in a bit-parallel  
format.  
35 GND  
34 Q1  
HF 22  
PEN 23  
AF/AE 24  
LDCK 25  
NC 26  
33 Q0  
32 UNCK  
31 NC  
NC 27  
30 NC  
FULL 28  
29 EMPTY  
Data is written into memory on a low-to-high  
transition at the load clock (LDCK) input and is  
read out on a low-to-high transition at the unload  
clock (UNCK) input. The memory is full when the  
number of words clocked in exceeds the number  
of words clocked out by 64. When the memory is  
full, LDCK signals have no effect on the data  
residing in memory. When the memory is empty,  
UNCK signals have no effect.  
Status of the FIFO memory is monitored by the full (FULL), empty (EMPTY), half-full (HF), and  
almost-full/almost-empty (AF/AE) flags. The FULL output is low when the memory is full and high when the  
memory is not full. The EMPTY output is low when the memory is empty and high when it is not empty. The HF  
output is high when the FIFO contains 32 or more words and is low when it contains 31 or fewer words. The  
AF/AE status flag is a programmable flag. The first one or two low-to-high transitions of LDCK after reset are  
used to program the almost-empty offset value (X) and the almost-full offset value (Y) if program enable (PEN)  
is low. The AF/AE flag is high when the FIFO contains X or fewer words or (64 – Y) or more words. The AF/AE  
flag is low when the FIFO contains between (X + 1) and (63 – Y) words.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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