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SN74ACT7200L25NP PDF预览

SN74ACT7200L25NP

更新时间: 2024-09-16 05:17:59
品牌 Logo 应用领域
德州仪器 - TI 光电二极管
页数 文件大小 规格书
23页 305K
描述
256 】 9, 512 】 9, 1024 】 9 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES

SN74ACT7200L25NP 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP28,.3针数:28
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.71Factory Lead Time:1 week
风险等级:5.26最长访问时间:25 ns
最大时钟频率 (fCLK):28.5 MHz周期时间:35 ns
JESD-30 代码:R-PDIP-T28长度:34.545 mm
内存密度:2304 bit内存集成电路类型:OTHER FIFO
内存宽度:9功能数量:1
端子数量:28字数:256 words
字数代码:256工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:256X9可输出:NO
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP28,.3封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:4.57 mm
最大待机电流:0.0005 A子类别:FIFOs
最大压摆率:0.125 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

SN74ACT7200L25NP 数据手册

 浏览型号SN74ACT7200L25NP的Datasheet PDF文件第2页浏览型号SN74ACT7200L25NP的Datasheet PDF文件第3页浏览型号SN74ACT7200L25NP的Datasheet PDF文件第4页浏览型号SN74ACT7200L25NP的Datasheet PDF文件第5页浏览型号SN74ACT7200L25NP的Datasheet PDF文件第6页浏览型号SN74ACT7200L25NP的Datasheet PDF文件第7页 
SN74ACT7200L, SN74ACT7201LA, SN74ACT7202LA  
256 × 9, 512 × 9, 1024 × 9  
ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES  
SCAS221A – FEBRUARY 1993 – REVISED SEPTEMBER 1995  
DV OR NP PACKAGE  
(TOP VIEW)  
Reads and Writes Can Be Asynchronous  
or Coincident  
Organization:  
W
D8  
D3  
D2  
D1  
D0  
XI  
V
CC  
D4  
1
2
3
4
5
6
7
8
9
28  
27  
26  
25  
24  
23  
22  
21  
20  
– SN74ACT7200L – 256 × 9  
– SN74ACT7201LA – 512 × 9  
– SN74ACT7202LA – 1024 × 9  
D5  
D6  
D7  
FL/RT  
RS  
Fast Data Access Times of 15 ns  
Read and Write Frequencies up to 40 MHz  
Bit-Width and Word-Depth Expansion  
FF  
Q0  
EF  
XO/HF  
Fully Compatible With the  
IDT7200/7201/7202  
Q1 10  
19 Q7  
Retransmit Capability  
Q2  
Q3  
Q6  
Q5  
11  
12  
18  
17  
Empty, Full, and Half-Full Flags  
TTL-Compatible Inputs  
Q8 13  
16 Q4  
15  
GND 14  
R
Available in 28-Pin Plastic DIP (NP),  
Small-Outline (DV), and 32-Pin Plastic  
J-Leaded Chip-Carrier (RJ) Packages  
RJ PACKAGE  
(TOP VIEW)  
description  
The SN74ACT7200L, SN74ACT7201LA, and  
SN74ACT7202LA are constructed with dual-port  
SRAM and have internal write and read address  
counters to provide data throughput on a first-in,  
first-out (FIFO) basis. Write and read operations  
are independent and can be asynchronous or  
coincident. Empty and full status flags prevent  
underflow and overflow of memory, and  
depth-expansion logic allows combining the  
storage cells of two or more devices into one  
FIFO. Word-width expansion is also possible.  
4
3
2
1
32 31 30  
29  
5
6
7
8
9
D2  
D1  
D0  
XI  
D6  
D7  
NC  
FL/RT  
RS  
28  
27  
26  
25  
FF  
Q0 10  
24 EF  
Q1  
NC  
Q2  
XO/HF  
Q7  
Q6  
11  
12  
13  
23  
22  
21  
14 15 16 17 18 19 20  
Data is loaded into memory by the write-enable  
(W) input and unloaded by the read-enable (R)  
input. Read and write cycle times of 25 ns  
(40 MHz) are possible with data access times of  
15 ns.  
NC – No internal connection  
These devices are particularly suited for providing a data channel between two buses operating at  
asynchronous rates. Applications include use as rate buffers from analog-to-digital converters in data-  
acquisition systems, temporary storage elements between buses and magnetic or optical memories, and  
queues for communication systems. A 9-bit-wide data path is provided for the transmission of byte data plus  
a parity bit or packet-framing information. The read pointer can be reset independently of the write pointer for  
retransmitting previously read data when a device is not used in depth expansion.  
The SN74ACT7200L, SN74ACT7201LA, and SN74ACT7202LA are characterized for operation from 0°C  
to 70°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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