Datasheet > 存储 > FIFO> SN74ACT2226DWR

SN74ACT2226DWR

更新时间： 2024-11-06 05:17:59

品牌	Logo	应用领域
德州仪器 - TI		存储内存集成电路光电二极管先进先出芯片时钟
页数	文件大小	规格书
15页	257K
描述
DUAL 64 】 1, DUAL 256 】 1 CLOCKED FIRST-IN, FIRST-OUT MEMORIES

阅读下载

中文翻译

获取价格

技术参数
数据手册
替代型号

如果您发现信息不准确，欢迎纠错

SN74ACT2226DWR 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	SOIC-24	针数：	24
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.32.00.71	Factory Lead Time：	1 week
风险等级：	1.34	Is Samacsys：	N
最长访问时间：	20 ns	最大时钟频率 (fCLK)：	20 MHz
周期时间：	45.45 ns	JESD-30 代码：	R-PDSO-G24
JESD-609代码：	e4	长度：	15.4 mm
内存密度：	64 bit	内存集成电路类型：	OTHER FIFO
内存宽度：	1	湿度敏感等级：	1
功能数量：	2	端子数量：	24
字数：	64 words	字数代码：	64
工作模式：	SYNCHRONOUS	最高工作温度：	85 °C
最低工作温度：	-40 °C	组织：	64X1
输出特性：	TOTEM POLE	可输出：	NO
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP24,.4	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	并行/串行：	SERIAL
峰值回流温度（摄氏度）：	260	电源：	5 V
认证状态：	Not Qualified	座面最大高度：	2.65 mm
最大待机电流：	0.0004 A	子类别：	FIFOs
最大压摆率：	0.0004 mA	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7.5 mm	Base Number Matches：	1

SN74ACT2226DWR 数据手册

SN74ACT2226, SN74ACT2228

DUAL 64 × 1, DUAL 256 × 1

CLOCKED FIRST-IN, FIRST-OUT MEMORIES

SCAS219C – JUNE 1992 – REVISED OCTOBER 1997

DW PACKAGE

(TOP VIEW)

Dual Independent FIFOs Organized as:

64 Words by 1 Bit Each – SN74ACT2226

256 Words by 1 Bit Each – SN74ACT2228

1HF

1AF/AE

1WRTCLK

1WRTEN

1IR

GND

1RESET

1RDCLK

1RDEN

Free-Running Read and Write Clocks Can

Be Asynchronous or Coincident on Each

FIFO

22 1OR

21 1Q

Input-Ready Flags Synchronized to Write

Clocks

20 2RESET

Output-Ready Flags Synchronized to Read

Clocks

2IR

2WRTEN

2WRTCLK

2AF/AE

2HF

Half-Full and Almost-Full/Almost-Empty

Flags

2OR

2RDEN

2RDCLK

Support Clock Frequencies up to 22 MHz

Access Times of 20 ns

Low-Power Advanced CMOS Technology

Packaged in 24-Pin Small-Outline

Integrated-Circuit Package

description

The SN74ACT2226 and SN74ACT2228 are dual FIFOs suited for a wide range of serial-data buffering

applications, including elastic stores for frequencies up to T2 telecommunication rates. Each FIFO on the chip

is arranged as 64 × 1 (SN74ACT2226) or 256 × 1 (SN74ACT2228) and has control signals and status flags for

independent operation. Output flags for each FIFO include input ready (1IR or 2IR), output ready (1OR or 2OR),

half full (1HF or 2HF), and almost full/almost empty (1AF/AE or 2AF/AE).

Serial data is written into a FIFO on the low-to-high transition of the write-clock (1WRTCLK or 2WRTCLK) input

when the write-enable (1WRTEN or 2WRTEN) input and input-ready flag (1IR or 2IR) output are both high.

Serial data is read from a FIFO on the low-to-high transition of the read-clock (1RDCLK or 2RDCLK) input when

the read-enable (1RDEN or 2RDEN) input and output-ready flag (1OR or 2OR) output are both high. The read

and write clocks of a FIFO can be asynchronous to one another.

Each input-ready flag (1IR or 2IR) is synchronized by two flip-flop stages to its write clock (1WRTCLK or

2WRTCLK), and each output-ready flag (1OR or 2OR) is synchronized by three flip-flop stages to its read clock

(1RDCLK or 2RDCLK). This multistage synchronization ensures reliable flag-output states when data is written

and read asynchronously.

A half-full flag (1HF or 2HF) is high when the number of bits stored in its FIFO is greater than or equal to half

the depth of the FIFO. An almost-full/almost-empty flag (1AF/AE or 2AF/AE) is high when eight or fewer bits

are stored in its FIFO and when eight or fewer empty locations are left in the FIFO. A bit present on the data

output is not stored in the FIFO.

The SN74ACT2226 and SN74ACT2228 are characterized for operation from –40°C to 85°C.

For more information on this device family, see the application report FIFOs With a Word Width of One Bit

(literature number SCAA006).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...15

中文翻译

下载PDF

SN74ACT2226DWR 替代型号

型号	品牌	替代类型	描述	数据表
SN74ACT2226DW	TI	完全替代	DUAL 64 】 1, DUAL 256 】 1 CLOCKED FIRST-IN, F

与SN74ACT2226DWR相关器件

型号	品牌	获取价格	描述	数据表
SN74ACT2227	TI	获取价格	DUAL 64 】 1, DUAL 256 】 1 FIRST-IN, FIRST-OUT
SN74ACT2227_15	TI	获取价格	DUAL 64 Ã 1, DUAL 256 Ã 1 FIRST-IN, FIRST-O
SN74ACT2227DW	TI	获取价格	DUAL 64 】 1, DUAL 256 】 1 FIRST-IN, FIRST-OUT
SN74ACT2228	TI	获取价格	DUAL 64 】 1, DUAL 256 】 1 CLOCKED FIRST-IN, F
SN74ACT2228DW	TI	获取价格	DUAL 64 】 1, DUAL 256 】 1 CLOCKED FIRST-IN, F
SN74ACT2228DWR	TI	获取价格	DUAL 64 】 1, DUAL 256 】 1 CLOCKED FIRST-IN, F
SN74ACT2229	TI	获取价格	DUAL 64 】 1, DUAL 256 】 1 FIRST-IN, FIRST-OUT
SN74ACT2229DW	TI	获取价格	DUAL 64 】 1, DUAL 256 】 1 FIRST-IN, FIRST-OUT
SN74ACT2229DWR	TI	获取价格	256 x 1 x 2 dual independent synchronous FIFO memories 28-SOIC -40 to 85
SN74ACT2235	TI	获取价格	1024 】 9 】 2 ASYNCHRONOUS BIDIRECTIONAL FIRST

与SN74ACT2226DWR相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

14
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

12
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

36
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

33

产品中心

服务支持

精选活动

关于我们

帮助中心

SN74ACT2226DWR

SN74ACT2226DWR 技术参数

SN74ACT2226DWR 数据手册

SN74ACT2226DWR 替代型号

与SN74ACT2226DWR相关器件

与SN74ACT2226DWR相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SN74ACT2226DWR

SN74ACT2226DWR 技术参数

SN74ACT2226DWR 数据手册

SN74ACT2226DWR 替代型号

与SN74ACT2226DWR相关器件

与SN74ACT2226DWR相关文章

您还可以找

您在本页遇到什么问题？