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SN74ACT16861DL PDF预览

SN74ACT16861DL

更新时间: 2024-11-06 14:38:35
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
9页 299K
描述
ACT SERIES, DUAL 10-BIT TRANSCEIVER, TRUE OUTPUT, PDSO56

SN74ACT16861DL 技术参数

生命周期:ObsoleteReach Compliance Code:unknown
风险等级:5.84Is Samacsys:N
其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION系列:ACT
JESD-30 代码:R-PDSO-G56长度:18.415 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS TRANSCEIVER
位数:10功能数量:2
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
传播延迟(tpd):11.1 ns认证状态:Not Qualified
座面最大高度:2.79 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
宽度:7.5 mmBase Number Matches:1

SN74ACT16861DL 数据手册

 浏览型号SN74ACT16861DL的Datasheet PDF文件第2页浏览型号SN74ACT16861DL的Datasheet PDF文件第3页浏览型号SN74ACT16861DL的Datasheet PDF文件第4页浏览型号SN74ACT16861DL的Datasheet PDF文件第5页浏览型号SN74ACT16861DL的Datasheet PDF文件第6页浏览型号SN74ACT16861DL的Datasheet PDF文件第7页 
54ACT16861, 74ACT16861  
20-BIT BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCAS197B – JUNE 1990 – REVISED NOVEMBER 1996  
54ACT16861 . . . WD PACKAGE  
74ACT16861 . . . DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
Inputs Are TTL-Voltage Compatible  
3-State Outputs Drive Bus Lines Directly  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
1OEAB  
1B1  
1OEBA  
1A1  
1A2  
GND  
1A3  
1A4  
Flow-Through Architecture Optimizes  
PCB Layout  
2
3
1B2  
GND  
1B3  
4
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
5
6
1B4  
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
7
V
V
CC  
CC  
8
1B5  
1B6  
1B7  
GND  
1B8  
1B9  
1B10  
2B1  
2B2  
2B3  
GND  
2B4  
2B5  
2B6  
1A5  
1A6  
1A7  
GND  
1A8  
1A9  
1A10  
2A1  
2A2  
2A3  
GND  
2A4  
2A5  
2A6  
500-mA Typical Latch-Up Immunity at  
125°C  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
Package Options Include Shrink Plastic  
Small-Outline 300-mil (DL) Packages Using  
25-mil Center-to-Center Pin Spacings and  
380-mil Fine-Pitch Ceramic Flat (WD)  
Packages Using 25-mil Center-to-Center  
Pin Spacings  
description  
The ’ACT16861 are noninverting 20-bit  
transceivers designed for asynchronous  
communication between data buses. The  
control-function implementation minimizes  
external timing requirements.  
V
V
CC  
CC  
2B7  
2B8  
GND  
2A7  
2A8  
GND  
2A9  
2A10  
2OEBA  
The ’ACT16861 can be used as two 10-bit  
transceivers or one 20-bit transceiver. They allow  
data transmission from the A bus to the B bus or  
from the B bus to the A bus, depending upon the  
logic level at the output-enable (OEAB or OEBA)  
inputs. The output-enable inputs can be used to  
disable the device so that the buses are effectively  
isolated.  
2B9  
2B10  
2OEAB  
The 74ACT16861 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and  
functionality of standard small-outline packages in the same printed-circuit-board area.  
The 54ACT16861 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
74ACT16861 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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