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SN65MLVD200A_08 PDF预览

SN65MLVD200A_08

更新时间： 2024-11-24 04:31:19
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德州仪器 - TI 驱动器
页数 文件大小 规格书
25页 667K
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MULTIPOINT-LVDS LINE DRIVER AND RECEIVER

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SN65MLVD200A_08 数据手册

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SN65MLVD200A, SN65MLVD202A  
SN65MLVD204A, SN65MLVD205A  
www.ti.com  
SLLS573–DECEMBER 2003  
MULTIPOINT-LVDS LINE DRIVER AND RECEIVER  
FEATURES  
DESCRIPTION  
•
Low-Voltage Differential 30-Ω to 55-Ω Line  
Drivers and Receivers for Signaling Rates  
Up to 100 Mbps, Clock Frequencies up to  
50 MHz  
The SN65MLVD200A, 202A, 204A, and 205A are  
multipoint-low-voltage differential (M-LVDS) line  
drivers and receivers, which are optimized to operate  
at signaling rates up to 100 Mbps. All parts comply  
with the multipoint low-voltage differential signaling  
(M-LVDS) standard TIA/EIA-899. These circuits are  
similar to their TIA/EIA-644 standard compliant LVDS  
counterparts, with added features to address  
multipoint applications. The driver output has been  
designed to support multipoint buses presenting  
loads as low as 30 Ω, and incorporates controlled  
transition times to allow for stubs off of the backbone  
transmission line.  
(1)  
•
•
Type-1 Receivers Incorporate 25 mV of  
Hysteresis (200A, 202A)  
Type-2 Receivers Provide an Offset(100 mV)  
Threshold to Detect Open-Circuit and Idle-Bus  
Conditions (204A, 205A)  
•
Meets or Exceeds the M-LVDS Standard  
TIA/EIA-899 for Multipoint Data Interchange  
•
•
Power Up/Down Glitch Free  
These devices have Type-1 and Type-2 receivers  
that detect the bus state with as little as 50 mV of  
Controlled Driver Output Voltage Transition  
Times for Improved Signal Quality  
differential input voltage over  
a common-mode  
•
–1 V to 3.4 V Common-Mode Voltage Range  
Allows Data Transfer With 2 V of Ground  
Noise  
voltage range of –1 V to 3.4 V. The Type-1 receivers  
exhibit 25 mV of differential input voltage hysteresis  
to prevent output oscillations with slowly changing  
signals or loss of input. Type-2 receivers include an  
offset threshold to provide a known output state  
under open-circuit, idle-bus, and other fault  
conditions.  
•
•
Bus Pins High Impedance When Disabled or  
VCC ≤ 1.5 V  
200-Mbps Devices Available (SN65MLVD201,  
203, 206, 207)  
The SN65MLVD200A, 202A, 204A, and 205A have  
enhancements over their predecessors. Improved  
features include better controlled slew rate on the  
driver output to help minimize reflections while  
improving overall signal integrity (SI) resulting in  
better jitter performance. Additionally, 8-kV ESD  
protection on the bus pins for more robustness. The  
same footprint definition was maintained making for  
•
•
Bus Pin ESD Protection Exceeds 8 kV  
Package in 8-Pin SOIC (200A, 204A) and  
14-Pin SOIC (202A, 205A)  
•
Improved Alternatives to the SN65MLVD200,  
202, 204, and 205  
APPLICATIONS  
•
an easy drop-in replacement for  
performance upgrade.  
a
system  
Low-Power High-Speed Short-Reach  
Alternative to TIA/EIA-485  
Backplane or Cabled Multipoint Data and  
Clock Transmission  
The devices are characterized for operation from  
–40°C to 85°C.  
•
•
•
•
Cellular Base Stations  
Central-Office Switches  
Network Switches and Routers  
(1) The signaling rate of a line, is the number of voltage  
transitions that are made per second expressed in the nits  
bps (bits per second).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–TBD, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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