SN65LVDS3486DG4

更新时间： 2024-11-18 05:25:03

品牌	Logo	应用领域
德州仪器 - TI		/
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HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

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SN65LVDS3486DG4 数据手册

SN55LVDS32, SN65LVDS32

SN65LVDS3486, SN65LVDS9637

www.ti.com

SLLS262N–JULY 1997–REVISED MARCH 2004

HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

FEATURES

SN55LVDS32 . . . J OR W

SN65LVDS32 . . . D OR PW

(Marked as LVDS32 or 65LVDS32)

(TOP VIEW)

•

Meet or Exceed the Requirements of ANSI

TIA/EIA-644 Standard

•

Operate With a Single 3.3-V Supply

V_CC

Designed for Signaling Rate of up to 400

Mbps

•

Differential Input Thresholds ±100 mV Max

Typical Propagation Delay Time of 2.1 ns

11 3Y

Power Dissipation 60 mW Typical Per

Receiver at 200 MHz

GND

•

Bus-Terminal ESD Protection Exceeds 8 kV

Low-Voltage TTL (LVTTL) Logic Output Levels

SN55LVDS32FK

(TOP VIEW)

Pin Compatible With AM26LS32, MC3486, and

µA9637

•

Open-Circuit Fail-Safe

20 19

DESCRIPTION

The SN55LVDS32, SN65LVDS32, SN65LVDS3486,

and SN65LVDS9637 are differential line receivers

that implement the electrical characteristics of

low-voltage differential signaling (LVDS). This

signaling technique lowers the output voltage levels

of 5-V differential standard levels (such as

EIA/TIA-422B) to reduce the power, increase the

switching speeds, and allow operation with a 3.3-V

supply rail. Any of the four differential receivers

provides a valid logical output state with a ±100-mV

differential

common-mode

common-mode voltage range allows 1 V of ground

potential difference between two LVDS nodes.

10 11 12 13

SN65LVDS3486D (Marked as LVDS3486)

(TOP VIEW)

V_CC

input

voltage

within

range.

the

The

input

1,2EN

3,4EN

The intended application of these devices and

signaling technique is both point-to-point and

multidrop (one driver and multiple receivers) data

transmission over controlled impedance media of

approximately 100 Ω. The transmission media may

be printed-circuit board traces, backplanes, or cables.

The ultimate rate and distance ofdata transfer

depends on the attenuation characteristics of the

media and the noise coupling to the environment.

GND

10 3A

SN65LVDS9637D (Marked as DK637 or LVDS37)

SN65LVDS9637DGN (Marked as L37)

SN65LVDS9637DGK (Marked as AXF)

(TOP VIEW)

V_CC

The

SN65LVDS32,

SN65LVDS3486,

and

SN65LVDS9637 are characterized for operation from

–40°C to 85°C. The SN55LVDS32 is characterized

for operation from –55°C to 125°C.

GND

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...31

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SN65LVDS3486DG4 替代型号

型号	品牌	替代类型	描述	数据表
SN65LVDS3486D	TI	类似代替	HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

与SN65LVDS3486DG4相关器件

型号	品牌	获取价格	描述	数据表
SN65LVDS3486DR	TI	获取价格	HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS3486DRG4	TI	获取价格	HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS3486ID	TI	获取价格	QUAD LINE TRANSCEIVER, PDSO16
SN65LVDS3486IDR	TI	获取价格	暂无描述
SN65LVDS3487	TI	获取价格	HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SN65LVDS3487D	TI	获取价格	HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SN65LVDS3487DG4	TI	获取价格	HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SN65LVDS3487DR	TI	获取价格	HIGH SPEED DIFFERENTIAL LINE DRIVERS
SN65LVDS3487DRG4	TI	获取价格	HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SN65LVDS3487ID	TI	获取价格	QUAD LINE TRANSCEIVER, PDSO16

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