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SN65C1406_06

更新时间: 2024-09-15 04:51:19
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德州仪器 - TI 驱动器
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15页 435K
描述
TRIPLE LOW-POWER DRIVERS/RECEIVERS

SN65C1406_06 数据手册

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SN65C1406, SN75C1406  
TRIPLE LOW-POWER DRIVERS/RECEIVERS  
SLLS148E – MAY 1990 – REVISED OCTOBER 2001  
SN65C1406 . . . D PACKAGE  
SN75C1406 . . . D, DW, N, OR NS PACKAGE  
(TOP VIEW)  
Meet or Exceed the Requirements of  
TIA/EIA-232-F and ITU Recommendation  
V.28  
Very Low Power Consumption . . .  
5 mW Typ  
V
V
1
2
3
4
5
6
7
8
16  
15  
14  
CC  
DD  
1RY  
1DA  
1RA  
1DY  
2RA  
2DY  
3RA  
3DY  
Wide Driver Supply Voltage Range . . .  
±4.5 V to ±15 V  
13 2RY  
12 2DA  
Driver Output Slew Rate Limited to  
30 V/µs Max  
11  
10  
9
3RY  
3DA  
GND  
Receiver Input Hysteresis . . . 1000 mV Typ  
Push-Pull Receiver Outputs  
V
SS  
On-Chip Receiver 1-µs Noise Filter  
Functionally Interchangeable With Motorola  
MC145406 and Texas Instruments  
TL145406  
Package Options Include Plastic  
Small-Outline (D, DW, NS) Packages and  
DIPs (N)  
description  
The SN65C1406 and SN75C1406 are low-power BiMOS devices containing three independent drivers and  
receivers that are used to interface data terminal equipment (DTE) with data circuit-terminating equipment  
(DCE). These devices are designed to conform to TIA/EIA-232-F. The drivers and receivers of the SN65C1406  
and SN75C1406 are similar to those of the SN75C188 quadruple driver and SN75C189A quadruple receiver,  
respectively. The drivers have a controlled output slew rate that is limited to a maximum of 30 V/µs, and the  
receivers have filters that reject input noise pulses shorter than 1 µs. Both these features eliminate the need  
for external components.  
The SN65C1406 and SN75C1406 are designed using low-power techniques in a BiMOS technology. In most  
applications, the receivers contained in these devices interface to single inputs of peripheral devices such as  
ACEs, UARTs, or microprocessors. By using sampling, such peripheral devices are usually insensitive to the  
transition times of the input signals. If this is not the case, or for other uses, it is recommended that the  
SN65C1406 and SN75C1406 receiver outputs be buffered by single Schmitt input gates or single gates of the  
HCMOS, ALS, or 74F logic families.  
The SN65C1406 is characterized for operation from –40°C to 85°C. The SN75C1406 is characterized for  
operation from 0°C to 70°C.  
AVAILABLE OPTIONS  
PACKAGED DEVICES  
SMALL  
OUTLINE  
(D)  
SMALL  
OUTLINE  
(DW)  
PLASTIC  
DIP  
PLASTIC  
SMALL OUTLINE  
(NS)  
T
A
(N)  
–40°C to 85°C  
0°C to 70°C  
SN65C1406D  
SN75C1406D SN75C1406DW SN75C1406N  
SN75C1406NS  
The D, DW, and PW packages are available taped and reeled. Add the suffix R to device type  
(e.g., SN75C1406DR).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2001, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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