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SN64BCT373N PDF预览

SN64BCT373N

更新时间： 2024-11-15 02:58:47
品牌 Logo 应用领域
德州仪器 - TI 驱动信息通信管理光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
4页 77K
描述
OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

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SN64BCT373N 数据手册

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SCBS065A − JUNE 1990 − REVISED JANUARY 1994  
DW OR N PACKAGE  
(TOP VIEW)  
• State-of-the-Art BiCMOS Design  
Significantly Reduces I  
CCZ  
• ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
14  
13  
12  
8Q  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
• High-Impedance State During Power Up and  
Power Down  
• 3-State True Outputs Drive Bus Lines or  
Buffer-Memory Address Registers  
• Full Parallel Access for Loading  
• Package Options Include Plastic  
Small-Outline (DW) Packages and Standard  
Plastic 300-mil DIPs (N)  
GND 10  
11 LE  
description  
This 8-bit latch features 3-state outputs designed specifically for driving highly capacitive or relatively  
low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus  
drivers, and working registers.  
The eight latches of the SN64BCT373 are transparent D-type latches. While the latch-enable (LE) input is high,  
the Q outputs follow the data (D) inputs. When the enable is taken low, the Q outputs are latched at the levels  
that were set up at the D inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or a high-impedance state. In the high-impedance state the outputs neither load nor drive  
the bus lines significantly. The high-impedance impedance state and increased drive provide the capability to  
drive bus lines without need for interface or pullup components.  
The output-enable (OE) does not affect the internal operations of the latches. Old data can be retained or new  
data can be entered while the outputs are off.  
The outputs are in a high-impedance state during power up and power down while the supply voltage is less  
than approximately 3 V.  
The SN64BCT373 is characterized for operation from −40°C to 85°C and 0°C to 70°C.  
FUNCTION TABLE  
(each latch)  
INPUTS  
OUTPUT  
Q
OE  
L
LE  
H
H
L
D
H
L
H
L
L
L
X
X
Q
0
H
X
Z
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Copyright 1994, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443  
1234

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SN64BCT373N 替代型号

型号 品牌 替代类型 描述 数据表
SN74BCT373DWR TI

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SN74BCT373DBR TI

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 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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 		OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN64BCT541ADW TI

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SN64BCT541AN TI

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SN64BCT541N TI

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