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SN54HC594J PDF预览

SN54HC594J

更新时间: 2024-11-22 23:03:03
品牌 Logo 应用领域
德州仪器 - TI 移位寄存器触发器逻辑集成电路输出元件
页数 文件大小 规格书
9页 156K
描述
8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS

SN54HC594J 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:0.300 INCH, CERAMIC, DIP-16针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.63Is Samacsys:N
其他特性:PARALLEL OUTPUT IS REGISTERED; ASYNCHRONOUS CLEAR FOR STORAGE REGISTER计数方向:RIGHT
系列:HC/UHJESD-30 代码:R-GDIP-T16
长度:19.56 mm负载电容(CL):50 pF
逻辑集成电路类型:SERIAL IN PARALLEL OUT位数:8
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:TRUE封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE传播延迟(tpd):300 ns
认证状态:Not Qualified座面最大高度:5.08 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
宽度:7.62 mm最小 fmax:20 MHz
Base Number Matches:1

SN54HC594J 数据手册

 浏览型号SN54HC594J的Datasheet PDF文件第2页浏览型号SN54HC594J的Datasheet PDF文件第3页浏览型号SN54HC594J的Datasheet PDF文件第4页浏览型号SN54HC594J的Datasheet PDF文件第5页浏览型号SN54HC594J的Datasheet PDF文件第6页浏览型号SN54HC594J的Datasheet PDF文件第7页 
SN54HC594, SN74HC594  
8-BIT SHIFT REGISTERS  
WITH OUTPUT REGISTERS  
SCLS040C – DECEMBER 1982 – REVISED FEBRUARY 1998  
SN54HC594 . . . J OR W PACKAGE  
SN74HC594 . . . D, DB, OR N PACKAGE  
(TOP VIEW)  
8-Bit Serial-In, Parallel-Out Shift Registers  
With Storage  
Independent Direct Overriding Clears on  
Shift and Storage Registers  
Q
Q
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
B
Independent Clocks for Both Shift and  
Storage Registers  
Q
C
D
A
Q
SER  
Q
RCLR  
RCLK  
SRCLK  
SRCLR  
High-Current Outputs Can Drive Up to  
15 LSTTL Loads  
E
Q
Q
F
Package Options Include Plastic  
G
Q
Small-Outline (D), Shrink Small-Outline  
(DB), and Ceramic Flat (W) Packages,  
Ceramic Chip Carriers (FK), and Standard  
Plastic (N) and Ceramic (J) 300-mil DIPs  
H
GND  
Q
H  
SN54HC594 . . . FK PACKAGE  
(TOP VIEW)  
description  
The ’HC594 devices contain an 8-bit serial-in,  
parallel-out shift register that feeds an 8-bit D-type  
storage register. Separate clocks and direct  
overriding clear (RCLR, SRCLR) inputs are  
provided on both the shift and storage registers.  
3
2
1
20 19  
18  
SER  
RCLR  
NC  
Q
4
5
6
7
8
D
Q
17  
16  
E
NC  
A serial (Q ) output is provided for cascading  
15 RCLK  
14  
9 10 11 12 13  
Q
F
H′  
purposes.  
SRCLK  
Q
G
Boththeshiftregister(RCLK)andstorageregister  
(SRCLK) clocks are positive edge triggered. If  
both clocks are connected together, the shift  
register is always one count pulse ahead of the  
storage register.  
NC – No internal connection  
The parallel (Q –Q ) outputs have high-current  
A
H
capability. Q is a standard output.  
H′  
The SN54HC594 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74HC594 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1998, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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具有三态输出寄存器的 8 位移位寄存器