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SN54HC623J PDF预览

SN54HC623J

更新时间： 2024-11-22 23:03:03
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
6页 114K
描述
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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SN54HC623J 技术参数

生命周期：Obsolete零件包装代码：DIP
包装说明：DIP, DIP20,.3针数：20
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.56其他特性：WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型：INDEPENDENT CONTROL计数方向：BIDIRECTIONAL
系列：HC/UHJESD-30 代码：R-GDIP-T20
长度：24.195 mm负载电容（CL）：150 pF
逻辑集成电路类型：BUS TRANSCEIVER最大I（ol）：0.006 A
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装等效代码：DIP20,.3封装形状：RECTANGULAR
封装形式：IN-LINE电源：2/6 V
Prop。Delay @ Nom-Sup：32 ns传播延迟（tpd）：200 ns
认证状态：Not Qualified座面最大高度：5.08 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：6 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：MILITARY端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
翻译：N/A宽度：7.62 mm
Base Number Matches：1

SN54HC623J 数据手册

 浏览型号SN54HC623J的Datasheet PDF文件第2页浏览型号SN54HC623J的Datasheet PDF文件第3页浏览型号SN54HC623J的Datasheet PDF文件第4页浏览型号SN54HC623J的Datasheet PDF文件第5页浏览型号SN54HC623J的Datasheet PDF文件第6页 
SN54HC623, SN74HC623  
OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCLS149B – DECEMBER 1982 – REVISED MAY 1997  
SN54HC623 . . . J OR W PACKAGE  
SN74HC623 . . . DW OR N PACKAGE  
(TOP VIEW)  
Lock Bus-Latch Capability  
True Logic  
High-Current 3-State Outputs Can Drive up  
to 15 LSTTL Loads  
OEAB  
A1  
V
CC  
OEBA  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
Package Options Include Plastic  
Small-Outline (DW) and Ceramic Flat (W)  
Packages, Ceramic Chip Carriers (FK), and  
Standard Plastic (N) and Ceramic (J)  
300-mil DIPs  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
GND  
B1  
B2  
B3  
B4  
B5  
description  
13 B6  
12 B7  
These octal bus transceivers are designed for  
asynchronous two-way communication between  
data buses. The control-function implementation  
allows for maximum flexibility in timing.  
11  
B8  
SN54HC623 . . . FK PACKAGE  
(TOP VIEW)  
The ’HC623 allow data transmission from the  
A bus to the B bus or from the B bus to the A bus,  
depending upon the logic levels at the  
output-enable (OEAB and OEBA) inputs.  
3
2
1
20 19  
18  
B1  
B2  
B3  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
OEAB and OEBA disable the device so that the  
buses are effectively isolated. The dual-enable  
configuration gives the transceivers the capability  
to store data by simultaneously enabling OEAB  
and OEBA. Each output reinforces its input in this  
transceiver configuration. When both OEAB and  
OEBA are enabled and all other data sources to  
thetwosetsofbuslinesareinthehigh-impedance  
state, both sets of bus lines (16 total) remain at  
their last states. The 8-bit codes appearing on the  
two sets of buses are identical.  
17  
16  
15 B4  
14  
9 10 11 12 13  
B5  
The SN54HC623 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74HC623 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OPERATION  
OEBA  
OEAB  
L
H
H
L
H
L
B data to A bus  
A data to B bus  
Isolation  
B data to A bus,  
A data to B bus  
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1997, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

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