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SN54HC112

更新时间： 2024-09-12 23:03:03
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德州仪器 - TI 触发器
页数 文件大小 规格书
7页 97K
描述
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

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SN54HC112 数据手册

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SN54HC112, SN74HC112  
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS  
WITH CLEAR AND PRESET  
SCLS099C – DECEMBER 1982 – REVISED APRIL 1999  
SN54HC112 . . . J OR W PACKAGE  
SN74HC112 . . . D OR N PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline (D) and Ceramic Flat (W)  
Packages, Ceramic Chip Carriers (FK), and  
Standard Plastic (N) and Ceramic (J) DIPs  
1CLK  
1K  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
1CLR  
2CLR  
2CLK  
description  
1J  
1PRE  
1Q  
The ’HC112 devices contain two independent J-K  
negative-edge-triggered flip-flops. A low level at  
the preset (PRE) or clear (CLR) inputs sets or  
resets the outputs regardless of the levels of the  
other inputs. When PRE and CLR are inactive  
(high), data at the J and K inputs meeting the  
setup time requirements are transferred to the  
outputs on the negative-going edge of the clock  
(CLK) pulse. Clock triggering occurs at a voltage  
level and is not directly related to the rise time of  
CLK. Following the hold-time interval, data at the  
J and K inputs may be changed without affecting  
the levels at the outputs. These versatile flip-flops  
perform as toggle flip-flops by tying J and K high.  
12 2K  
11  
10  
9
1Q  
2J  
2Q  
2PRE  
2Q  
GND  
SN54HC112 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
2CLR  
2CLK  
NC  
1J  
1PRE  
NC  
4
5
6
7
8
17  
16  
The SN54HC112 is characterized for operation  
over the full military temperature range of –55°C  
to 125°C. The SN74HC112 is characterized for  
operation from –40°C to 85°C.  
15 2K  
14  
9 10 11 12 13  
1Q  
2J  
1Q  
NC – No internal connection  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
PRE  
L
CLR  
H
CLK  
X
J
X
X
X
L
K
X
X
X
L
Q
H
L
Q
L
H
L
X
H
†
H
†
L
L
X
H
H
H
↓
Q
Q
0
0
H
H
↓
H
L
L
H
L
H
H
↓
H
H
X
L
H
H
H
↓
H
X
Toggle  
H
H
H
Q
Q
0
0
†
This configuration is unstable; that is, it does not persist  
when either PRE or CLR returns to its inactive (high) level.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

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SN54HC112 替代型号

型号 品牌 替代类型 描述 数据表
SN74HC112 TI

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 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

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