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SN54F20FKR PDF预览

SN54F20FKR

更新时间: 2024-10-31 13:13:43
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德州仪器 - TI 输入元件
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SN54F20FKR 数据手册

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SN54F20, SN74F20  
DUAL 4-INPUT POSITIVE-NAND GATES  
SDFS041A – MARCH 1987 – REVISED OCTOBER 1993  
SN54F20 . . . J PACKAGE  
SN74F20 . . . D OR N PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline Packages, Ceramic Chip  
Carriers, and Standard Plastic and Ceramic  
300-mil DIPs  
1A  
1B  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
2D  
2C  
NC  
2B  
2A  
2Y  
description  
NC  
1C  
These devices contain two independent 4-input  
NAND gates. They perform the Boolean functions  
Y = A B C D or Y = A + B + C + D in positive  
logic.  
1D  
1Y  
GND  
8
The SN54F20 is characterized for operation over  
the full military temperature range of 55°C to  
125°C. The SN74F20 is characterized for  
operation from 0°C to 70°C.  
SN54F20 . . . FK PACKAGE  
(TOP VIEW)  
FUNCTION TABLE  
(each gate)  
3
2
1
20 19  
18  
NC  
NC  
1C  
NC  
1D  
2C  
NC  
NC  
NC  
2B  
4
5
6
7
8
INPUTS  
OUTPUT  
Y
17  
16  
15  
14  
A
H
L
B
C
H
X
X
L
D
H
X
X
X
L
H
X
L
L
H
H
H
H
9 10 11 12 13  
X
X
X
X
X
X
NC – No internal connection  
logic symbol  
1
&
1A  
1B  
1C  
1D  
2
4
5
6
1Y  
9
2A  
2B  
2C  
2D  
10  
12  
13  
8
2Y  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
Pin numbers shown are for the D, J, and N packages.  
logic diagram, each gate (positive logic)  
A
B
C
D
Y
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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