SN54F243, SN74F243
QUADRUPLE BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDFS086 – MARCH 1987 – REVISED OCTOBER 1993
SN54F243 . . . J PACKAGE
SN74F243 . . . D OR N PACKAGE
(TOP VIEW)
• Asynchronous Communication Between
Data Buses
• Local Bus-Latch Capability
• True Logic
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
OEAB
NC
V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
OEBA
NC
B1
A1
A2
A3
B2
A4
B3
description
GND
B4
8
These quadruple bus transceivers are designed
for asynchronous communications between data
buses. Thecontrolfunctionimplementationallows
for maximum flexibility in timing. These devices
allow data transmission from the A bus to the
B bus or from the B bus to the A bus depending
upon the logic levels at the output-enable (OEBA
and OEAB) inputs. The output-enable inputs can
be used to disable the device so that the buses are
effectively isolated.
SN54F243 . . . FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18
NC
NC
B1
A1
NC
A2
4
5
6
7
8
17
16
15
14
NC
B2
NC
A3
The dual-enable configuration gives the
quadruple bus transceivers the capability to store
data by simultaneous enabling of OEBA and
OEAB. Each output reinforces its input in this
transceiverconfiguration. Thus, whenbothcontrol
inputs are enabled and all other data sources to
the two sets of bus lines are at high impedance,
both sets of bus lines (eight in all) remain at their
states. The 4-bit codes appearing on the two sets
of buses will be identical for the ′F243.
9 10 11 12 13
NC – No internal connection
The SN54F243 is characterized for operation over
the full military temperature range of –55°C to
125°C. The SN74F243 is characterized for
operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
FUNCTION
OEBA
OEAB
L
H
H
L
H
L
A to B
B to A
Isolation
Latch A and B
(A = B)
L
H
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
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