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SN54ABT573W PDF预览

SN54ABT573W

更新时间: 2024-11-11 23:06:07
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器锁存器逻辑集成电路输出元件信息通信管理
页数 文件大小 规格书
20页 760K
描述
OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

SN54ABT573W 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DFP包装说明:CERAMIC, FP-20
针数:20Reach Compliance Code:not_compliant
ECCN代码:3A001.A.2.CHTS代码:8542.39.00.01
风险等级:5.4Is Samacsys:N
其他特性:BROADSIDE VERSION OF 373系列:ABT
JESD-30 代码:R-GDFP-F20长度:13.09 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.048 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DFP封装等效代码:FL20,.3
封装形状:RECTANGULAR封装形式:FLATPACK
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):30 mAProp。Delay @ Nom-Sup:7.5 ns
传播延迟(tpd):7.5 ns认证状态:Not Qualified
座面最大高度:2.54 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BICMOS温度等级:MILITARY
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.92 mmBase Number Matches:1

SN54ABT573W 数据手册

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ꢊ ꢋꢆꢄꢌ ꢆ ꢍꢄꢁꢀ ꢎꢄꢍꢏ ꢁꢆ ꢐꢑꢆ ꢒꢎ ꢏ ꢌꢄꢆꢋ ꢓ ꢏꢀ  
ꢔ ꢕꢆ ꢓ ꢈ ꢑꢀꢆꢄꢆ ꢏ ꢊ ꢖꢆ ꢎ ꢖꢆꢀ  
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003  
D
Typical V  
(Output Ground Bounce)  
D
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD 17  
OLP  
<1 V at V  
= 5 V, T = 25°C  
CC  
A
D
High-Drive Outputs (−32-mA I , 64-mA I  
)
D
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
OH  
OL  
D
I
Supports Partial-Power-Down Mode  
off  
Operation  
SN54ABT573 . . . J OR W PACKAGE  
SN74ABT573A . . . DB, DW, N, NS,  
OR PW PACKAGE  
SN74ABT573A . . . RGY PACKAGE  
(TOP VIEW)  
SN54ABT573 . . . FK PACKAGE  
(TOP VIEW)  
(TOP VIEW)  
1
20  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1Q  
1
2
3
4
5
6
7
8
9
10  
20  
19  
3
2
1
20 19  
18  
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
2Q  
3Q  
4Q  
5Q  
6Q  
3D  
4D  
5D  
6D  
7D  
4
5
6
7
8
18 2Q  
17  
16  
15  
14  
17  
16  
15  
14  
13  
12  
11  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
LE  
9 10 11 12 13  
10  
11  
GND  
description/ordering information  
These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively  
low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional  
bus drivers, and working registers.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
Tube  
SN74ABT573AN  
SN74ABT573AN  
AB573A  
QFN − RGY  
Tape and reel SN74ABT573ARGYR  
Tube SN74ABT573ADW  
SOIC − DW  
ABT573A  
Tape and reel SN74ABT573ADWR  
Tape and reel SN74ABT573ANSR  
Tape and reel SN74ABT573ADBR  
SOP − NS  
ABT573A  
AB573A  
−40°C to 85°C  
SSOP − DB  
Tube  
SN74ABT573APW  
TSSOP − PW  
AB573A  
AB573A  
Tape and reel SN74ABT573APWR  
SN74ABT573AGQNR  
VFBGA − GQN  
VFBGA − ZQN (Pb-free)  
CDIP − J  
Tape and reel  
SN74ABT573AZQNR  
Tube  
Tube  
Tube  
SNJ54ABT573J  
SNJ54ABT573W  
SNJ54ABT573FK  
SNJ54ABT573J  
SNJ54ABT573W  
SNJ54ABT573FK  
CFP − W  
−55°C to 125°C  
LCCC − FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢊ ꢘ ꢣ ꢛ ꢚꢦ ꢡꢠ ꢞꢟ ꢠꢚ ꢜꢣ ꢥꢗ ꢝꢘ ꢞ ꢞꢚ ꢭꢕ ꢌꢑ ꢎꢍ ꢮ ꢑꢈꢯꢂ ꢈꢂꢉ ꢝꢥꢥ ꢣꢝ ꢛ ꢝ ꢜꢢ ꢞꢢꢛ ꢟ ꢝ ꢛ ꢢ ꢞꢢ ꢟꢞꢢ ꢦ  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
ꢡ ꢘꢥ ꢢꢟꢟ ꢚ ꢞꢨꢢ ꢛ ꢪꢗ ꢟꢢ ꢘ ꢚꢞꢢ ꢦꢧ ꢊ ꢘ ꢝꢥ ꢥ ꢚ ꢞꢨꢢ ꢛ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢟ ꢉ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢗꢚ ꢘ  
ꢦꢢ  
ꢜꢢ  
ꢢꢛ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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