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SN54ABT640J PDF预览

SN54ABT640J

更新时间: 2024-09-23 23:06:07
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路输出元件信息通信管理
页数 文件大小 规格书
6页 110K
描述
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SN54ABT640J 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:20
Reach Compliance Code:unknown风险等级:5.63
Is Samacsys:N其他特性:WITH DIRECTION CONTROL
系列:ABTJESD-30 代码:R-GDIP-T20
长度:24.195 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS TRANSCEIVER位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE最大电源电流(ICC):30 mA
传播延迟(tpd):5 ns认证状态:Not Qualified
座面最大高度:5.08 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:BICMOS
温度等级:MILITARY端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mmBase Number Matches:1

SN54ABT640J 数据手册

 浏览型号SN54ABT640J的Datasheet PDF文件第2页浏览型号SN54ABT640J的Datasheet PDF文件第3页浏览型号SN54ABT640J的Datasheet PDF文件第4页浏览型号SN54ABT640J的Datasheet PDF文件第5页浏览型号SN54ABT640J的Datasheet PDF文件第6页 
SN54ABT640, SN74ABT640  
OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS104C – FEBRUARY 1991 – REVISED JANUARY 1997  
SN54ABT640 . . . J PACKAGE  
SN74ABT640 . . . DB, DW, N, OR PW PACKAGE  
(TOP VIEW)  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
DIR  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
OE  
B1  
B2  
B3  
B4  
B5  
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD-17  
Typical V  
(Output Ground Bounce) < 1 V  
OLP  
at V  
= 5 V, T = 25°C  
CC  
A
High-Drive Outputs (–32-mA I  
,
OH  
13 B6  
12 B7  
64-mA I  
)
OL  
Package Options Include Plastic  
11  
GND  
B8  
Small-Outline (DW), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK), and  
Plastic (N) and Ceramic (J) DIPs  
SN54ABT640 . . . FK PACKAGE  
(TOP VIEW)  
description  
3
2
1
20 19  
18  
The ’ABT640 bus transceivers are designed for  
asynchronous communication between data  
buses. These devices transmit inverted data from  
the A bus to the B bus or from the B bus to the  
A bus, depending on the level at the direction-  
control (DIR) input. The output-enable (OE) input  
can be used to disable the device so that the  
buses are effectively isolated.  
B1  
B2  
B3  
B4  
B5  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
17  
16  
15  
14  
9 10 11 12 13  
To ensure the high-impedance state during power  
up or power down, OE should be tied to V  
CC  
through a pullup resistor; the minimum value of  
the resistor is determined by the current-sinking  
capability of the driver.  
The SN54ABT640 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74ABT640 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OPERATION  
OE  
L
DIR  
L
B data to A bus  
A data to B bus  
Isolation  
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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