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SMJ44C251B12HMM PDF预览

SMJ44C251B12HMM

更新时间: 2024-11-21 20:29:19
品牌 Logo 应用领域
MICROSS 动态存储器内存集成电路
页数 文件大小 规格书
58页 4989K
描述
Video DRAM, 256KX4, 120ns, CMOS, CDSO28, CERAMIC, LCC-28

SMJ44C251B12HMM 数据手册

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VRAM  
SMJ44C251B  
MT42C4256  
256K X 4 VRAM  
256K x 4 DRAM  
PIN ASSIGNMENT  
(Top View)  
with 512K x 4 SAM  
AVAILABLE AS MILITARY  
SPECIFICATIONS  
• SMD 5962-89497  
• MIL-STD-883  
28-Pin DIP (C)  
(400 MIL)  
28-Pin SOJ (DCJ)  
28-Pin LCC (EC)  
SC  
SDQ1  
SDQ2  
TR\/OE\  
DQ1  
1
2
3
4
5
6
Vss  
SDQ4  
SDQ3  
Vss  
28  
27  
26  
1
2
3
4
5
6
7
8
SC  
SDQ1  
SDQ2  
TR\/OE\  
DQ1  
DQ2  
ME\/WE\  
NC  
RAS\  
A8  
A6  
A5  
A4  
28  
27  
26  
25  
24  
23  
22  
SDQ4  
SDQ3  
SE\  
DQ4  
DQ3  
DSF  
25 SE\  
24 DQ4  
23 DQ3  
DQ2  
7
8
ME\/WE\  
NC  
22  
DSF  
FEATURES  
21 CAS\  
21 CAS\  
20 QSF  
19 A0  
9
20  
19  
18  
17  
16  
15  
RAS\  
A8  
A6  
A5  
A4  
QSF  
A0  
A1  
A2  
A3  
A7  
9
Class B High-Reliability Processing  
10  
11  
12  
13  
10  
11  
12  
13  
14  
DRAM: 262144 Words × 4 Bits  
SAM: 512 Words × 4 Bits  
18  
17  
16  
15  
A1  
A2  
A3  
A7  
Single 5-V Power Supply (±10% Tolerance)  
Dual Port Accessibility–Simultaneous and Asynchronous Access  
From the DRAM and SAM Ports  
Bidirectional-Data-Transfer Function Between the DRAM and the  
Serial-Data Register  
4 × 4 Block-Write Feature for Fast Area Fill Operations; As Many  
as Four Memory Address Locations Written per Cycle From an  
On-Chip Color Register  
Write-Per-Bit Feature for Selective Write to Each RAM I/O; Two  
Write-Per-Bit Modes to Simplify System Design  
Enhanced Page-Mode Operation for Faster Access  
CAS-Before-RAS (CBR) and Hidden Refresh Modes  
All Inputs/Outputs and Clocks Are TTL Compatible  
Long Refresh Period: Every 8 ms (Max)  
Up to 33-MHz Uninterrupted Serial-Data Streams  
3-State Serial I/Os Allow Easy Multiplexing of Video-Data  
Streams  
Vcc 14  
Vcc  
28-Pin ZIP (CZ)  
1
3
5
7
DSF  
DQ3  
SDQ2  
Vss  
SDQ0  
TRG\  
DQ1  
GND  
A8  
A5  
Vcc  
A3  
A1  
DQ2  
SE\  
SDQ3  
SC  
SDQ1  
DQ0  
W\  
RAS\  
A8  
2
4
6
8
9
10  
12  
14  
16  
18  
20  
22  
11  
13  
15  
17  
19  
21  
23  
25  
27  
A4  
A7  
24 A2  
26 A0  
28 CAS\  
QSF  
28-Pin FP (F)  
SC  
SDQ1  
SDQ2  
TR\/OE\  
DQ1  
DQ2  
ME\/WE\  
NC  
1
2
3
4
5
6
7
8
Vss  
28  
512 Selectable Serial-Register Starting  
Split Serial-Data Register for Simplied Real-Time Register Reload  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
SDQ4  
SDQ3  
SE\  
DQ4  
DQ3  
DSF  
CAS\  
QSF  
A0  
A1  
A2  
A3  
A7  
OPTIONS  
• Timing  
MARKING  
9
100ns, 30ns/27ns  
120ns, 35ns/35ns  
-10  
-12  
RAS\  
A8  
A6  
A5  
A4  
10  
11  
12  
13  
14  
• Package(s)  
MT Prex  
SMJ Prex  
Vcc  
Ceramic SOJ  
Ceramic DIP (400 mil)  
Ceramic LCC  
Ceramic ZIP  
Ceramic LCC  
DCJ  
C
EC  
CZ  
---  
F
---  
PIN NAME  
(SMJ)  
A0 - A8  
CAS\  
DQ0 - DQ3  
SE\  
PIN NAME  
(MT)  
A0 - A8  
CAS\  
JDM  
HMM  
SVM  
HJM  
---  
DESCRIPTION  
Address Inputs  
Column Enable  
DQ1 - DQ4 DRAM Data In-Out/Write-Mask Bit  
SE\  
RAS\  
SC  
Serial Enable  
Row Enable  
Serial Data Clock  
RAS\  
SC  
Ceramic Flat Pack  
SDQ0 - SDQ3 SDQ1 - SDQ4 Serial Data In-Out  
TRG\  
W\  
DSF  
QSF  
Vcc  
TR\ /OE\  
ME\ /WE\  
DSF  
QSF  
Vcc  
Transfer Register/Q Output Enable  
Write-Mask Select/Write Enable  
Special Function Select  
Split-Register Activity Status  
5V Supply  
For more products and information  
please visit our web site at  
www.micross.com  
Vss  
Vss  
Ground  
Ground (Important: Not Connected to  
internal Vss, Pin should be left open or  
tied to ground.  
GND  
NC  
Micross Components reserves the right to change products or specications without notice.  
SMJ44C251B/MT42C4256  
Rev. 0.6 06/10  
1

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