Datasheet > SMJ44C251B-12JD

SMJ44C251B-12JD

更新时间： 2024-11-21 15:51:51

品牌	Logo	应用领域
MICROSS		/
页数	文件大小	规格书
53页	945K
描述
Memory IC,

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SMJ44C251B-12JD 数据手册

SMJ44C251B

262144 BY 4-BIT

MULTIPORT VIDEO RAM

SGMS058A – MARCH 1995 – REVISED JUNE 1995

Military Operating Temperature Range

Enhanced Page-Mode Operation for Faster

Access

– 55°C to 125°C

Performance Ranges:

CAS-Before-RAS (CBR) and Hidden

Refresh Modes

ACCESS

TIME

ACCESS ACCESS ACCESS

TIME

SERIAL

ENABLE

(MAX)

All Inputs/Outputs and Clocks Are TTL

Compatible

ROW

COLUMN SERIAL

ADDRESS ENABLE DATA

(MAX) (MAX) (MAX)

Long Refresh Period

Every 8 ms (Max)

a(SE)

20 ns

a(R)

a(C)

a(SQ)

Up to 33-MHz Uninterrupted Serial-Data

Streams

’44C251B-10 100 ns

’44C251B-12 120 ns

25 ns

30 ns

35 ns

25 ns

3-State Serial I/Os Allow Easy Multiplexing

of Video-Data Streams

Class B High-Reliability Processing

DRAM: 262144 Words × 4 Bits

SAM: 512 Words × 4 Bits

512 Selectable Serial-Register Starting

Locations

Single 5-V Power Supply (±10% Tolerance)

Packaging:

– 28-Pin J-Leaded Ceramic Chip Carrier

Package (HJ Suffix)

– 28-Pin Leadless Ceramic Chip Carrier

Package (HM Suffix)

– 28-Pin Ceramic Sidebrazed DIP

(JD Suffix)

Dual Port Accessibility–Simultaneous and

Asynchronous Access From the DRAM and

SAM Ports

Bidirectional-Data-Transfer Function

Between the DRAM and the Serial-Data

4 × 4 Block-Write Feature for Fast Area Fill

Operations; As Many as Four Memory

Address Locations Written per Cycle From

an On-Chip Color Register

– 28-Pin Zig-Zag In-Line (ZIP), Ceramic

Package (SV Suffix)

Split Serial-Data Register for Simplified

Real-Time Register Reload

Write-Per-Bit Feature for Selective Write to

Each RAM I/O; Two Write-Per-Bit Modes to

Simplify System Design

description

PIN NOMENCLATURE

A0–A8

CAS

DQ0–DQ3

RAS

SDQ0–SDQ3 Serial Data In-Out

TRG

DSF

QSF

Address Inputs

Column Enable

DRAM Data In-Out/Write-Mask Bit

Serial Enable

Row Enable

The SMJ44C251B multiport video RAM is a

high-speed, dual-ported memory device. It

consists of a dynamic random-access memory

(DRAM) organized as 262144 words of 4 bits

each interfaced to a serial-data register or

serial-access memory (SAM) organized as 512

words of 4 bits each. The SMJ44C251B supports

three types of operation: random access to and

from the DRAM, serial access to and from the

serial register, and bidirectional transfer of data

between any row in the DRAM and the serial

SMJ44C251B can be accessed simultaneously

and asynchronously from the DRAM and SAM

ports.

Serial Data Clock

Transfer Register/Q Output Enable

Write-Mask Select/Write Enable

Special Function Select

Split-Register Activity Status

5-V Supply

GND

Ground

Ground (Important: Not connected

to internal V

)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

12 3 4 5 6 7...53

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与SMJ44C251B-12JD相关器件

型号	品牌	获取价格	描述	数据表
SMJ44C251B-12JDL	TI	获取价格	256KX4 VIDEO DRAM, 120ns, CDIP28, 0.400 INCH, SIDE BRAZED, CERAMIC, DIP-28
SMJ44C251B12JDM	AUSTIN	获取价格	256K X 4 VRAM 256K x 4 DRAM with 512K x 4 SAM
SMJ44C251B-12JDM	AUSTIN	获取价格	256K X 4 VRAM 256K x 4 DRAM with 512K x 4 SAM
SMJ44C251B-12SV	MICROSS	获取价格	Memory IC
SMJ44C251B12SVM	AUSTIN	获取价格	256K X 4 VRAM 256K x 4 DRAM with 512K x 4 SAM
SMJ44C251B12SVM	MICROSS	获取价格	Video DRAM, 256KX4, 120ns, CMOS, CZIP28, CERAMIC, ZIP-28
SMJ44C251B-12SVM	AUSTIN	获取价格	256K X 4 VRAM 256K x 4 DRAM with 512K x 4 SAM
SMJ44C251B-12SVM883C	MICROSS	获取价格	Video DRAM, 256KX4, 120ns, CMOS, CZIP28, CERAMIC, ZIP-28
SMJ44C256	TI	获取价格	262144 BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY
SMJ44C256-10FQ	TI	获取价格	SMJ44C256-10FQ

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