Datasheet > SiSF20DN

SiSF20DN

更新时间： 2024-11-19 14:55:27

品牌	Logo	应用领域
威世 - VISHAY		/
页数	文件大小	规格书
9页	225K
描述
Common - Drain Dual N-Channel 60 V (S1-S2) MOSFET

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SiSF20DN 数据手册

SiSF20DN

Vishay Siliconix

www.vishay.com

Common - Drain Dual N-Channel 60 V (S1-S2) MOSFET

FEATURES

• TrenchFET^®Gen IV power MOSFET

PowerPAK^®1212-8SCD

S₁

• Very low source-to-source on resistance

S₂

• Integrated common-drain n-channel MOSFETs

in a compact and thermally enhanced package

S₁

S₂

• 100 % R_gand UIS tested

• Optimizes circuit layout for bi-directional current flow

G₁

• Material categorization: for definitions of compliance

please see www.vishay.com/doc?99912

D₁

D₂

G₂

APPLICATIONS

S₁

Top View

Bottom View

• Battery protection switch

G₁

• Bi-directional switch

PRODUCT SUMMARY

V_S1S2(V)

N-Channel 1 MOSFET

• Load switch

_S1S2(on)max. () at V_GS= 10 V

0.0130

0.0185

10.2 ^g

52 ^a

• 24 V systems

N-Channel 2 MOSFET

G₂

R_S1S2(on)max. () at V_GS= 4.5 V

Q_gtyp. (nC)

I_S1S2(A)

S₂

Configuration

Common - Drain

ORDERING INFORMATION

Package

PowerPAK 1212-8SCD

SiSF20DN-T1-GE3

Lead (Pb)-free and halogen-free

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C, unless otherwise noted)

PARAMETER

SYMBOL

LIMIT

UNIT

Drain-source voltage

Gate-source voltage

V_S1S2

V_GS

T_C= 25 °C

T_C= 70 °C

T_A= 25 °C

T_A= 70 °C

14 ^{b, c}

11 ^{b, c}

100

69.4

44.4

5.2 ^{b, c}

3.3 ^{b, c}

-55 to +150

260

Continuous drain current (T_J= 150 °C)

Pulsed drain current (t = 100 μs)

Maximum power dissipation

I_S1S2

I_S1S2M

P_S1S2

T_C= 25 °C

T_C= 70 °C

T_A= 25 °C

T_A= 70 °C

Operating junction and storage temperature range

Soldering recommendations (peak temperature) ^c

T_J, T_stg

°C

THERMAL RESISTANCE RATINGS

PARAMETER

Maximum junction-to-ambient ^b

SYMBOL

R_thJA

R_thJC

TYPICAL

MAXIMUM

UNIT

t  10 s

Steady state

1.8

°C/W

Maximum junction-to-case (drain)

1.4

Notes

a. T_C= 25 °C

b. Surface mounted on 1" x 1" FR4 board

c. t = 10 s

d. See solder profile (www.vishay.com/doc?73257). The PowerPAK 1212-8SCD is a leadless package. The end of the lead terminal is exposed

copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed

and is not required to ensure adequate bottom side solder interconnection

e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components

f. Maximum under steady state conditions is 63 °C/W

g. Single MOSFET

S18-1210-Rev. A, 10-Dec-2018

Document Number: 76915

For technical questions, contact: pmostechsupport@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

12 3 4 5 6 7...9

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