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SI50122-A3-GMR PDF预览

SI50122-A3-GMR

更新时间: 2024-11-21 15:51:11
品牌 Logo 应用领域
芯科 - SILICON 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
14页 293K
描述
Processor Specific Clock Generator, 100MHz, CMOS, PDSO10, 2 X 2.50 MM, ROHS COMPLIANT, TDFN-10

SI50122-A3-GMR 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:TDFN-10Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.84其他特性:ALSO REQUIRES 3.3V TYP SUPPLY
JESD-30 代码:R-PDSO-N10长度:2.5 mm
端子数量:10最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:100 MHz
封装主体材料:PLASTIC/EPOXY封装代码:VSON
封装等效代码:SOLCC10,.08,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, VERY THIN PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
电源:2.5/3.3 V主时钟/晶体标称频率:25 MHz
认证状态:Not Qualified座面最大高度:0.95 mm
子类别:Clock Generators最大压摆率:23 mA
最大供电电压:2.75 V最小供电电压:2.25 V
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:2 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches:1

SI50122-A3-GMR 数据手册

 浏览型号SI50122-A3-GMR的Datasheet PDF文件第2页浏览型号SI50122-A3-GMR的Datasheet PDF文件第3页浏览型号SI50122-A3-GMR的Datasheet PDF文件第4页浏览型号SI50122-A3-GMR的Datasheet PDF文件第5页浏览型号SI50122-A3-GMR的Datasheet PDF文件第6页浏览型号SI50122-A3-GMR的Datasheet PDF文件第7页 
Si50122-A3/A4  
CRYSTAL-LESS PCI-EXPRESS GEN 1 & GEN 2  
DUAL OUTPUT CLOCK GENERATOR  
Features  
Crystal-less clock generator with Triangular spread spectrum  
integrated CMEMS  
profile for maximum EMI  
reduction (Si50122-A4)  
PCI-Express Gen 1/2 compliant  
Industrial Temperature –40 to  
Two PCIe 100 MHz differential  
85 °C  
HCSL outputs  
2.5 V, 3.3 V Power supply  
One 25 MHz single-ended  
LVCMOS output  
Small package 10-pin TDFN  
(2.0x2.5 mm)  
Supports Serial (ATA) at  
100 MHz  
Si50122-A3 does not support  
Ordering Information:  
spread spectrum outputs  
Low power differential output  
See page 10  
buffers  
Si50122-A4 supports 0.5% down  
spread outputs  
No termination resistors required  
for differential output clocks  
Pin Assignments  
Applications  
VSS  
REFOUT  
NC  
1
2
3
4
5
10  
9
Digital TV  
Network Attached Storage  
Multi-function Printer  
Wireless Access Point  
Digital Video Cameras  
VDD  
VDD  
Set top box  
Solid State Drives (SSD)  
Wireless Access Point  
Home Gateway  
8
DIFF2  
DIFF2  
7
DIFF1  
DIFF1  
6
VSS  
Description  
Si50122-A3/A4 is a high performance, crystal-less PCIe clock generator  
that can generate two 100 MHz PCIe clock and one 25 MHz LVCMOS  
clock outputs. The differential clock outputs are compliant to PCIe Gen1  
and Gen 2 specifications. The ultra-small footprint (2.0x2.5 mm) and  
industry leading low power consumption make Si50122-A3/A4 the ideal  
clock solution for consumer and embedded applications where board  
space is limited and low power is needed.  
Patents pending  
Functional Block Diagram  
VDD  
REFOUT  
DIFF1  
PLL  
(SSC)  
Divider  
CMEMS  
DIFF2  
VSS  
Rev 0.7 9/14  
Copyright © 2014 by Silicon Laboratories  
Si50122-A3/A4  

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