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SG-710PTKFREQM0 PDF预览

SG-710PTKFREQM0

更新时间: 2024-10-29 15:51:07
品牌 Logo 应用领域
精工 - SEIKO 机械输出元件振荡器
页数 文件大小 规格书
3页 133K
描述
CRYSTAL OSCILLATOR, CLOCK, 1.8MHz - 50MHz, TTL OUTPUT

SG-710PTKFREQM0 数据手册

 浏览型号SG-710PTKFREQM0的Datasheet PDF文件第2页浏览型号SG-710PTKFREQM0的Datasheet PDF文件第3页 
Crystal oscillator  
HIGH-FREQUENCY CRYSTAL OSCILLATOR  
SG-710 series  
Ceramic package with 1.5 mm thickness.  
Excellent shock resistance and environmental capability.  
Low current consumption due to use of C-MOS technology.  
Low current consumption by output enabled function (OE) or  
standby function (ST).  
Specifications (characteristics)  
SG-710PTK  
SG-710PHK  
SG-710ECK  
Remarks  
Symbol  
f0  
Item  
Specifications  
1.8000 MHz to  
80.0000 MHz  
1.8000 MHz to  
67.0000 MHz  
1.8000 MHz to  
50.0000 MHz  
Output frequency range  
VDD-GND  
VDD  
Max. supply voltage  
-0.5 V to +7.0 V  
Power source  
voltage  
Operating voltage  
Storage temperature  
Operating temperature  
5.0  
V
0.5  
-55 °C to +125 °C  
-10 °C to +70 °C (-40 °C to +85 °C  
V
3.3 V 0.3 V  
TSTG  
Temperature  
range  
)
Please contact us on availability of -40 °C to +85 °C  
TOPR  
Twice at under +260 °C within 10 s  
Soldering condition  
TSOL  
-6  
-6  
-6  
B,C:-10 °C to +70 °C, M:-40 °C to +85 C°  
f/f0  
B: 50 x 10 C: 100 x 10 M: 100 x 10  
Frequency stability  
Iop  
IOE  
IST  
24 mA Max.  
12 mA Max.  
40 mA Max.  
16 mA Max.  
18 mA Max.  
Current consumption  
Output disable current  
Standby current  
No load condition  
OE=GND(PTK, PHK)  
ST=GND(ECK)  
10 µA Max.  
45 % to 55 %  
40 % to 60 %  
40 % to 60 %  
C-MOS load: 1/2 VDD level  
TTL load: 1.4 V level  
IOH=-16 mA(PTK,PHK),-2 mA(ECK)  
tw/ t  
Duty  
45 % to 55 %  
2.4 V Min.  
0.4 V Max.  
10 TTL Max.  
(15 pF Max.)  
2.0 V Min.  
0.8 V Max.  
VOH  
VOL  
N
CL  
VIH  
VIL  
High output voltage  
Low output voltage  
V
DD -0.5 V Min.  
0.5 V Max.  
10 TTL Max.  
50 pF Max.  
2.0 V Min.  
0.8 V Max.  
5 ns Max.  
0.9  
0.1  
x
x
VDD Min.  
VDD Max.  
I
OL= 16 mA(PTK,PHK), 2 mA(ECK)  
TTL  
C-MOS  
Output load  
condition (fan out)  
15 pF Max.  
0.7 x VDD Min.  
0.3 x VDD Max.  
6 ns Max.  
OE terminal(PTK,PHK)  
_
Output enable/disable input voltage  
ST terminal(ECK)  
C-MOS load: 10 %90  
TTL load: 0.4 V 2.4 V  
C-MOS load: 90 %10  
TTL load: 2.4 V 0.4 V  
%
V
V
DD  
DD  
C-MOS level  
TTL level  
C-MOS level  
Output rise time  
tTLH  
tTHL  
5 ns Max.  
5 ns Max.  
5 ns Max.  
6 ns Max.  
%
Output fall time  
TTL level  
Oscillation start up time  
Aging  
10 ms Max.  
tOSC  
Time at minimum operating voltage to be 0 s  
-6  
5 x 10 /year Max.  
Ta= +25 °C, VDD = 5.0 V/3.3 V(ECK)  
fa  
Three drops on a hard board from 750 mm  
or excitation test with 29400 m/s x 0.3 ms x  
-6  
2
S.R.  
10 x 10 Max.  
Shock resistance  
1/2sine wave in 3 directions  
(Unit: mm)  
(Unit: mm)  
Recommended soldering pattern  
External dimensions  
Bottom View  
1.4  
Pin terminal  
OE or ST  
GND  
NO.  
# 4  
# 3  
#2  
#1  
1.8  
1
2
3
4
E
40.000  
HC724A  
OUT  
VDD  
# 1  
# 2  
5.08  
#4  
#3  
L
L
W
7.5 Max. 5.0 Max.  
PTK/PHK/ECK  
∗∗W  
7.2 Max. 5.2 Max.  
5.08  
5.08  
37  

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