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SCAN92LV090SLC PDF预览

SCAN92LV090SLC

更新时间： 2024-01-20 13:32:21
品牌 Logo 应用领域
德州仪器 - TI 驱动接口集成电路驱动器
页数 文件大小 规格书
22页 881K
描述
具有边界扫描功能的 9 通道总线 LVDS 收发器 | NZC | 64 | -40 to 85

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SCAN92LV090SLC 技术参数

生命周期：Not Recommended零件包装代码：BGA
包装说明：BGA-64针数：64
Reach Compliance Code：not_compliantECCN代码：5A991.B.1
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.42Is Samacsys：N
差分输出：YES驱动器位数：9
高电平输入电流最大值：0.00002 A输入特性：DIFFERENTIAL SCHMITT TRIGGER
接口集成电路类型：LINE TRANSCEIVER接口标准：IEEE 1149.1
JESD-30 代码：S-PBGA-B64JESD-609代码：e0
长度：8 mm湿度敏感等级：3
功能数量：9端子数量：64
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE最大输出低电流：0.002 A
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：LFBGA封装等效代码：BGA64,8X8,32
封装形状：SQUARE封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：235电源：3.3 V
认证状态：Not Qualified最大接收延迟：3.9 ns
接收器位数：9座面最大高度：1.5 mm
子类别：Line Driver or Receivers最大压摆率：210 mA
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：3.3 V电源电压1-最大：3.6 V
电源电压1-分钟：3 V电源电压1-Nom：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：BALL端子节距：0.8 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
最大传输延迟：2.6 ns宽度：8 mm
Base Number Matches：1

SCAN92LV090SLC 数据手册

 浏览型号SCAN92LV090SLC的Datasheet PDF文件第2页浏览型号SCAN92LV090SLC的Datasheet PDF文件第3页浏览型号SCAN92LV090SLC的Datasheet PDF文件第4页浏览型号SCAN92LV090SLC的Datasheet PDF文件第6页浏览型号SCAN92LV090SLC的Datasheet PDF文件第7页浏览型号SCAN92LV090SLC的Datasheet PDF文件第8页 
SCAN92LV090  
www.ti.com  
SNLS058I –SEPTEMBER 2000–REVISED APRIL 2013  
DC ELECTRICAL CHARACTERISTICS (continued)  
Over recommended operating supply voltage and temperature ranges unless otherwise specified (1)(2)  
Symbol  
IIL  
Parameter  
Input Low Current  
Conditions  
Pin  
Min  
Typ  
Max  
Units  
VIN = GND  
TCK  
VCC  
-20  
+20  
µA  
ICCD  
ICCR  
ICCZ  
ICC  
Power Supply Current Drivers  
Enabled, Receivers Disabled  
No Load, DE = RE = VCC  
DIN = VCC or GND  
,
50  
50  
50  
80  
80  
80  
mA  
mA  
mA  
Power Supply Current Drivers  
Disabled, Receivers Enabled  
DE = RE = 0V, VID = ±300mV  
Power Supply Current, Drivers  
and Receivers tri-state  
DE = 0V; RE = VCC  
,
DIN = VCC or GND  
Power Supply Current, Drivers  
and Receivers Enabled  
DE = VCC; RE = 0V,  
DIN = VCC or GND,  
RL = 27Ω  
160  
180  
210  
230  
+20  
mA  
mA  
µA  
ICCS  
Power Supply Current (SCAN  
Test Mode), Drivers and  
Receivers Enabled  
DE = VCC; RE = 0V,  
DIN = VCC or GND,  
RL = 27Ω, TAP in any state other  
than Test-Logic-Reset  
IOFF  
Power Off Leakage Current  
VCC = 0V or OPEN,  
DIN, DE, RE = 0V or OPEN,  
VAPPLIED = 3.6V (Port Pins)  
DO+/RI+,  
DO−/RI−  
−20  
COUTPUT Capacitance @ Bus Pins  
COUTPUT Capacitance @ ROUT  
DO+/RI+,  
DO−/RI−  
5
7
pF  
pF  
ROUT  
AC ELECTRICAL CHARACTERISTICS  
Over recommended operating supply voltage and temperature ranges unless otherwise specified  
(1)  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
DIFFERENTIAL DRIVER TIMING REQUIREMENTS  
(2)  
tPHLD  
tPLHD  
tSKD1  
tSKD2  
tSKD3  
tTLH  
Differential Prop. Delay High to Low  
RL = 27Ω,  
See Figure 5 and  
Figure 6  
1.0  
1.0  
1.8  
1.8  
120  
2.6  
2.6  
ns  
ns  
ps  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
(2)  
Differential Prop. Delay Low to High  
(3)  
Differential Skew |tPHLD–tPLHD  
|
CL = 10 pF  
(4)  
Chip to Chip Skew  
1.6  
0.55  
1.2  
1.2  
8
(5)  
Channel to Channel Skew  
0.25  
0.5  
0.5  
3
Transition Time Low to High  
Transition Time High to Low  
Disable Time High to Z  
Disable Time Low to Z  
Enable Time Z to High  
Enable Time Z to Low  
tTHL  
tPHZ  
RL = 27Ω,  
See Figure 7 and  
Figure 8  
tPLZ  
3
8
tPZH  
3
8
CL = 10 pF  
tPZL  
3
8
DIFFERENTIAL RECEIVER TIMING REQUIREMENTS  
(2)  
tPHLD  
tPLHD  
tSDK1  
tSDK2  
tSDK3  
tTLH  
Differential Prop. Delay High to Low  
See Figure 9 and  
Figure 10  
CL = 35 pF  
2.0  
2.0  
2.4  
2.4  
210  
3.9  
3.9  
ns  
ns  
ps  
ns  
ns  
ns  
ns  
(2)  
Differential Prop Delay Low to High  
(3)  
Differential Skew |tPHLD–tPLHD  
|
(4)  
Chip to Chip Skew  
1.9  
0.7  
2.5  
2.5  
(5)  
Channel to Channel skew  
0.35  
1.5  
Transition Time Low to High  
Transition Time High to Low  
tTHL  
1.5  
(1) Generator waveforms for all tests unless otherwise specified: f = 25 MHz, ZO = 50Ω, tr, tf = <1.0 ns (0%–100%). To ensure fastest  
propagation delay and minimum skew, data input edge rates should be equal to or faster than 1ns/V; control signals equal to or faster  
than 3ns/V. In general, the faster the input edge rate, the better the AC performance.  
(2) Propagation delays are specified by design and characterization.  
(3) tSKD1 |tPHLD–tPLHD| is the worse case skew between any channel and any device over recommended operation conditions.  
(4) Chip to Chip skew is the difference in differential propagation delay between any channels of any devices, either edge.  
(5) Channel to Channel skew is the difference in driver output or receiver output propagation delay between any channels within a device,  
common edge.  
Copyright © 2000–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
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Product Folder Links: SCAN92LV090  
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