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S72WS256NDEBFW4Y3 PDF预览

S72WS256NDEBFW4Y3

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
飞索 - SPANSION /
页数 文件大小 规格书
30页 980K
描述
Based MCP/PoP Products

S72WS256NDEBFW4Y3 数据手册

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A d v a n c e I n f o r m a t i o n  
2 MCP Block Diagram  
2.1  
NOR Flash + ORNAND Flash + DRAM Products  
F-Vcc  
F-AVD#  
F-CLK  
AVD#  
CLK  
F-ACC  
ACC  
F-WP#  
F-RESET#  
F1-CE#  
F-WE#  
WP#  
RESET#  
CE#  
RDY  
DQ8:15  
DQ0:7  
RDY  
DQ8:15  
WE#  
OE#  
DQ0:7  
WS256N  
Vss  
F-OE#  
F-A23:A0  
F-VCCQ  
A23-A0  
F2-CE#  
CE#  
N-Vcc  
N-WP#  
N-CE#  
N-WE#  
N-RE#  
N-ALE  
N-CLE  
N-PRE  
WP#  
CE#  
WE#  
RE#  
ALE  
CLE  
PRE  
IO0:7  
MS01GP  
RY/BY#  
RY/BY#  
Vss  
D-Vcc  
V-Vccq  
A12-A0  
CE#  
D-A12-A0  
D-CE#  
DQ0:15  
D-DQ15-DQ0  
WE#  
BA0  
D-WE#  
D-BA0  
BA1  
D-BA1  
CKE  
D-CKE  
D-RAS#  
D-CAS#  
D-DM0  
D-DM1  
RAS#  
CAS#  
DM0  
DM1  
SDRAM  
D-Vss  
D-Vssq  
Notes:  
1. For a one-Flash configuration, F1-CE# = CE#.  
For a two-Flash configuration, F1-CE# = CE for Flash 1 and F2-CE# = CE for Flash 2; F2-CE# is the  
chip-enable pin for the second Flash.  
2. If ORNAND is not present in the MCP, then the MS01GP block will not be present in the figure above. In  
that case, the common signals go only to the WS256N flash, while the SDRAM signals remain unchanged.  
3. If ORNAND supports a x16 bus, then NOR DQ0-DQ15 is shared with ORNAND I/O0-I/O15.  
June 1, 2006 S72WS-N_00_A8  
S72WS-N Based MCP/PoP Products  
5

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