Datasheet > S5T8555X01-L0B0

S5T8555X01-L0B0

更新时间： 2024-11-24 22:17:31

品牌	Logo	应用领域
三星 - SAMSUNG		/
页数	文件大小	规格书
10页	88K
描述
TIME SLOT ASSIGNMENT CIRCUIT

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S5T8555X01-L0B0 数据手册

TIME SLOT ASSIGNMENT CIRCUIT

INTRODUCTION

S5T8555

20-CERDIP

The S5T8555 is a per channel Time Slot Assignment Circuit (TSAC)

that produces 8-bit receive and transmit time slots for four 1 CHIP

CODEC.

Each frame synchronization pulse may be independently assigned

to a time slot in a frame of up to 64 time slots

FEATURES

•

Single, 5V operation

Low power consumption: 5mW

Controls four 1 CHIP CODEC

Independent transmit and receive frame syncs

channel unidirectional mode

Up to 64 time slots per frame

Compatible with S5T8554B/7B CODECs

TTL and CMOS compatible

ORDERING INFORMATION

Device

Package

20- CERDIP

Operating Temperature

S5T8555X01-L0B0

- 20°C to 125°C

12 3 4 5 6 7...10

中文翻译

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型号	品牌	获取价格	描述	数据表
S5T8557B01-D0B0	SAMSUNG	获取价格	1 CHIP CODEC
S5T8557B01-S0B0	SAMSUNG	获取价格	1 CHIP CODEC
S5T8557B02-L0B0	SAMSUNG	获取价格	1 CHIP CODEC
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S5T8701	SAMSUNG	获取价格	FLEX ROAMING DECODER II
S5T8701X01-E0R0	SAMSUNG	获取价格	FLEX ROAMING DECODER II
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S5T8702X01-E0R0	SAMSUNG	获取价格	FEEX ALPHANUMERIC DECODER II
S5T8803A	SAMSUNG	获取价格	10 CH PLL