Datasheet > S5T8555X01-L0B0

S5T8555X01-L0B0

更新时间： 2022-11-26 01:19:04

品牌	Logo	应用领域
三星 - SAMSUNG		/
页数	文件大小	规格书
10页	88K
描述
TIME SLOT ASSIGNMENT CIRCUIT

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数据手册

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S5T8555X01-L0B0 数据手册

TIME SLOT ASSIGNMENT CIRCUIT

ELECTRICAL CHARACTERISTICS

S5T8555

(Unless otherwise noted; V = 5.0V ± 5%, Ta = 0°C to 70°C)

Characteristic

Operating Current

Symbol

Test Conditions

Min.

Typ.

Max.

Unit

BCLK = 2.048MHz, all output

open

1.5

Input Voltage High

Input Voltage Low

Input Current 1

2.0

0.7

All Inputs Except Mode,

- 1

V £V £V

Input Current 2

Mode, V = 0V

- 100

Output Voltage High

FS and FS Outputs,

2.4

= 3mA

Output Voltage Low

FS and FS Outputs,

0.4

= 3mA

TS output, I =3mA

0.4

Rise and Fall Time of Clock

BCLK, CLK

R (CK)

F (CK)

Delay to TS Low

C =50pF

140

D (TSXL)

Delay to TS High

R =1kW

100

D (TSXH)

Hold Time BCLK to Frame Sync

H (BFS)

H (FSB)

Set-Up Time from Frame Sync

BCLK

Delay Time from BLCK Low to

C = 50pF

FS 0-3 High or Low

X/R

Hold Time from Channel Select

to CLK

H (CSC)

Set-Up Time from Channel

Select to CLK

SU (CSC)

Period of Clock

BCLK, CLK

240

W (CKH)

Width of Clock High

Width of Clock Low

W (CKL)

Set-Up Time from D to CLK

SU (DCC)

Hold Time from CLK to D

H (CDC)

Set-Up Time from CS to CLK

Hold Time from CLK to CS

SU (CC)

100

H (CC)

1 2 3 456 7 8...10

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