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S5T8809

更新时间: 2022-11-26 02:59:57
品牌 Logo 应用领域
三星 - SAMSUNG /
页数 文件大小 规格书
14页 126K
描述
PLL FREQUENCY SYNTHESIZER FOR PAGER

S5T8809 数据手册

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PLL FREQUENCY SYNTHESIZER FOR PAGER  
INTRODUCTION  
S5T8809  
16-TSSOP-0044  
S5T8809 is a superior low-power-programmable PLL frequency  
synthesizer which can be used in high performance / Simple  
application for a Wide Area Pager system.  
S5T8809 consists of 2 kinds of divider block including a 19-bit Shift  
register, 16/18-bit Latch, 13/15bits R-counter and 16/18-bit N-  
Counter, 32/33 Prescaler, and a phase detector block including a  
Phase detector, Lock detector and a Charge pump.  
S5T8809 also has a battery saving mode which can control each  
register block by serial control data from the m-controller (MICOM)  
and it also has boost up signal output for fast locking.  
( Magnification = 1 : 4 )  
FEATURES  
Maximum operating frequency: 330MHz @ 300mV , V  
= 1.0V, V  
= 3.0V  
DD2  
P-P  
DD1  
On-chip reference oscillator supports external crystal which oscillates up to 23MHz  
Superior supply current:  
— F  
= 310MHz, I  
= 0.8mA (Typ.) @ V  
= 1.0V, V  
= 3.0V  
DD2  
FIN  
DD1  
DD1  
DD1  
DD2  
Operating voltage: V  
= 0.95 to 1.5V and V  
= 2.0 to 3.3V  
Excellent Divider range:  
— Ref. Divider:  
FRC (0): 1 / 40 to 1 / 65528 (Multiple): Default  
FRC (1): 1 / 5 to 1 / 32767  
— Rx Divider:  
PBC (0): 1 / 1056 ~ 1 / 65535: Default  
PBC (1): 1 / 1056 ~ 1 / 262143  
Boost-up signal output for Fast Locking  
In the Standby mode, VDD1 block can be controlled by BSB Pin status  
— Standby current consumption: 10mA (Max.)  
Programmable control the output of LD to reduce internal noise  
Programmable 17 / 19-bit shift register value controlled by PBC  
Charge pump output circuitry for passive filter  
Package type: 16- TSSOP (0.65mm)  
ORDERING INFORMATION  
Device  
+S5T8809X01-R0B0  
+: New Product  
Package  
16- TSSOP- 0044  
Operating Temperature  
- 25°C to +75°C  
1

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