D a t a S h e e t ( A d v a n c e I n f o r m a t i o n )
The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the
data contents of other sectors. The device is fully erased when shipped from the factory.
Hardware data protection measures include a low VCC detector that automatically inhibits write operations
during power transitions. The device also offers two types of data protection at the sector level. When ACC is
at VIL, the entire flash memory array is protected. Dynamic Sector Protection provides in-system, command-
enabled protection of any combination of sectors using a single power supply at VCC
.
The device offers two power-saving features. When addresses have been stable for a specified amount of
time, the device enters the automatic sleep mode. The system can also place the device into the standby
mode. Power consumption is greatly reduced in both modes.
Device programming occurs by executing the program command sequence. This initiates the Embedded
Program algorithm - an internal algorithm that automatically times the program pulse widths and verifies
proper cell margin. Additionally, Write Buffer Programming is available on this device. This feature provides
superior programming performance by grouping locations being programmed.
Device erasure occurs by executing the erase command sequence. This initiates the Embedded Erase
algorithm - an internal algorithm that automatically preprograms the array (if it is not already fully
programmed) before executing the erase operation. During erase, the device automatically times the erase
pulse widths and verifies proper cell margin.
The Program Suspend/Program Resume feature enables the user to put program on hold to read data from
any sector that is not selected for programming. If a read is needed from the Dynamic Protection area, or the
CFI area after a program suspend, then the user must use the proper command sequence to enter and exit
this region. The program suspend/resume functionality is also available when programming in erase suspend
(1 level depth only).
The Erase Suspend/Erase Resume feature enables the user to put erase on hold to read data from, or
program data to, any sector that is not selected for erasure. True background erase can thus be achieved. If
a read is needed from the Dynamic Protection area, or the CFI area after an erase suspend, then the user
must use the proper command sequence to enter and exit this region.
The hardware RESET# pin terminates any operation in progress and resets the internal state machine to
reading array data. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also
reset the device, enabling the system microprocessor to read boot-up firmware from the Flash memory
device.
The host system can detect whether a memory array program or erase operation is complete by using the
device status bit DQ7 (Data# Polling), DQ6/DQ2 (toggle bits), DQ5 (exceeded timing limit), and DQ1 (write to
buffer abort). After a program or erase cycle has been completed, the device automatically returns to reading
array data.
The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the
data contents of other sectors. The device is fully erased when shipped from the factory.
Spansion Inc. Flash technology combines years of Flash memory manufacturing experience to produce the
highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a sector
simultaneously via Fowler-Nordheim tunneling. The data is programmed using hot electron injection.
6
S29WS064R
S29WS064R_00_03 September 30, 2010
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