S1S61000
Open Architecture Network Controller
DESCRIPTIONS
The S1S61000 is a general-purpose network controller with various built-in peripherals. The S1S61000 comes with
network protocol software in package. It includes ARP, ICMP, IP, TCP and UDP that are necessary for TCP/IP
connection.
The interface to physical layer supports Media Independent Interface (MII).
Combined with
MII-compatible PHY chips, it easily realized 10BASE/100BASE network-capable equipment.
The CPU used in this IC is ARM720T with 8KB cache.
Network device drivers are attached for this product.
FEATURES
ꢀ Power saving by periodic suspension and restarting of the wakeup mode.
ꢀ Supports CompactFlash card interface for Wireless LAN interface (802.11b).
BUILT-IN FUNCTIONS
ꢀ CPU:
・ 32bit RISC ARM720T (50MHz)
・ 32Bit-long codes and efficient 16bit-long codes
(Thumb Code) can be selected for use
・ 31 general-purpose 32 bit registers
・ A multiplier is included in the CPU.
ꢀ Timer, Watchdog Timer:
・ 16-Bit timer × 3 channels
・ Re-load/Cyclic or One Shot Operation Mode
・ Supports toggle outputs from timer underflow or
port outputs.
・ Interrupt output or re-settable watchdog timer.
ꢀ RAM:
ꢀ Serial Interface:
・ 48KB Embedded RAM for CPU/Ethernet Work
・ 16550 Software compatible × 1 channel
・ Clock synchronous type × 3 channels
・ I2C Master interface (general-purpose use)
ꢀ Network:
・ Ethernet Mac controller supporting 10/100 BASE
Full duplex and Half duplex mode
・ Media Independent Interface (IEEE 802.3 Clause 22
compliant)
ꢀ Interrupt Controller:
・ Supports 32 IRQs and 2 FIQs.
ꢀ Real Time Clock:
・ An enhanced DMA
・ Supports day, hour, minute and second.
・ The internal timer tap from 1/128 to 1/2 can be
used as the interrupt source
ꢀ External Memory Controller:
・ 16Bit Data Bus
・ Supports 2 to 128MB SDRAM
・ Supports static memory (Flash EEPROM/SRAM)
(Maximum capacity: 4MB)
・ Supports alarm function and interrupt.
ꢀ GPIO:
・ General-purpose I/O port (up to 57 ports)
・ Directions programmable for all ports.
・ Some ports are shared with other I/O functions.
・ 3 Chip Select pins (typically for SDRAM, Flash
ROM and another chip).
ꢀ CF Card Interface:
ꢀ Power Supply:
・ 3.3V (I/O power supply), 1.8V (Core power supply,
Analog power supply for PLL)
・ CF+ Specification Rev.1.4 compliant.
・ Can be used as the interface of wireless LAN,
Memory card, etc.
ꢀ Package:
・ Supports True IDE interface
・ TQFP 144 Pin (TQFP24) 16 × 16 × 1mm
0.4mm Pin pitch
ꢀ Standby function:
・ The HALT function to stop the CPU clock when
CPU operation is not required.
・ Programmable I/O clock stop function for major
I/O block clocks.
SEIKO EPSON CORPORATION