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RHRXH162373K02V PDF预览

RHRXH162373K02V

更新时间: 2024-11-28 15:49:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 驱动输出元件逻辑集成电路
页数 文件大小 规格书
13页 184K
描述
ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, CDFP48, CERAMIC, DFP-48

RHRXH162373K02V 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Active零件包装代码:DFP
包装说明:DFP,针数:48
Reach Compliance Code:compliant风险等级:5.17
Is Samacsys:N系列:ALVC/VCX/A
JESD-30 代码:R-CDFP-F48JESD-609代码:e0
长度:15.75 mm逻辑集成电路类型:BUS DRIVER
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DFP
封装形状:RECTANGULAR封装形式:FLATPACK
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):5.7 ns
认证状态:Not Qualified筛选级别:MIL-PRF-38535 Class V
座面最大高度:2.72 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.8 V标称供电电压 (Vsup):2.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:TIN LEAD
端子形式:FLAT端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
总剂量:100k Rad(Si) V宽度:9.65 mm
Base Number Matches:1

RHRXH162373K02V 数据手册

 浏览型号RHRXH162373K02V的Datasheet PDF文件第2页浏览型号RHRXH162373K02V的Datasheet PDF文件第3页浏览型号RHRXH162373K02V的Datasheet PDF文件第4页浏览型号RHRXH162373K02V的Datasheet PDF文件第5页浏览型号RHRXH162373K02V的Datasheet PDF文件第6页浏览型号RHRXH162373K02V的Datasheet PDF文件第7页 
54VCXH162373  
LOW VOLTAGE CMOS 16-BIT D-TYPE LATCH (3-STATE)  
WITH 3.6V TOLERANT INPUTS AND OUTPUTS  
3.6V TOLERANT INPUTS AND OUTPUTS  
HIGH SPEED :  
t
t
= 3.3 ns (MAX.) at V = 3.0 to 3.6V  
PD  
CC  
= 4.5 ns (MAX.) at V = 2.3 to 2.7V  
PD  
CC  
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
FPC-48  
|I | = I = 12mA (MIN) at V = 3.0V  
OH  
OL  
CC  
|I | = I = 8mA (MIN) at V = 2.3V  
26SERIE RESISTOR IN OUTPUTS  
OPERATING VOLTAGE RANGE:  
OH  
OL  
CC  
These resistors permit to reduce line noise in high  
speed applications.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
V
(OPR) = 2.3V to 3.6V  
CC  
PIN AND FUNCTION COMPATIBLE WITH  
54 SERIES H162373  
BUS HOLD PROVIDED ON DATA INPUTS  
LATCH-UP PERFORMANCE EXCEEDS  
300mA (JESD 17)  
PIN CONNECTION  
ESD PERFORMANCE:  
HBM > 2000V (MIL STD 883 method 3015);  
MM > 200V  
100 Krad mil. 1019.6 (RHA QUAL)  
CONDITION A  
NO SEL, NO SEU UNDER 72 Mev/cm /mg  
LET HEAVY IONS IRRADIATION  
PRODUCT UNDER QML-V QUALIFICATION  
2
DESCRIPTION  
The 54VCXH162373 is a low voltage CMOS 16  
BIT D-TYPE LATCH with 3 STATE OUTPUTS  
NON INVERTING fabricated with sub-micron  
2
silicon gate and five-layer metal wiring C MOS  
technology. It is ideal for low power and very high  
speed 2.3 to 3.6V applications; it can be interfaced  
to 3.6V signal environment for both inputs and  
outputs.  
These 16 bit D-TYPE latches are bite controlled  
by two latch enable inputs (nLE) and two output  
enable inputs (OE).  
While the nLE input is held at a high level, the nQ  
outputs will follow the data input precisely.  
When the nLE is taken low, the nQ outputs will be  
in a normal logic state (high or low logic level) and  
while high level the outputs will be in a high  
impedance state. Bus hold on data inputs is  
provided in order to eliminate the need for external  
pull-up or pull-down resistor. The device circuits is  
including 26series resistance in the outputs.  
Rev. 1  
1/13  
July 2004  

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