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QS532807Q PDF预览

QS532807Q

更新时间: 2024-10-26 21:53:55
品牌 Logo 应用领域
艾迪悌 - IDT 时钟驱动器
页数 文件大小 规格书
6页 90K
描述
GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER

QS532807Q 数据手册

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GUARANTEED LOW SKEW  
CMOS CLOCK  
QS532807  
DRIVER/BUFFER  
FEATURES:  
DESCRIPTION:  
JEDEC compatible LVTTL level  
10 low skew clock outputs  
Clock input is 5V tolerant  
Pinout and function compatible with QS5807  
25on-chip resistors available for low noise  
Input hysteresis for better noise margin  
Guaranteed low skew:  
The QS532807 clock driver/buffer circuit can be used for clock  
bufferingschemes where lowskewis a keyparameter. The QS532807  
offers tennon-invertingoutputs. DesignedinIDT's proprietaryQCMOS  
process,these devices provide lowpropagationdelaybufferingwithon-  
chip skew of 0.35ns for same-transition, same bank signals. The  
QS532807has on-chipseries terminationresistors forlowernoise clock  
signals. The QS532807 series resistor version is recommended for  
driving unterminated lines with capacitive loading and other noise  
sensitive clock distribution circuits. These clock buffer products are  
designed for use in high-performance workstations, embedded and  
personal computing systems. Several devices can be used in parallel  
orscatteredthroughouta systemforguaranteedlowskew,system-wide  
clockdistributionnetworks.  
0.35ns output skew (same bank)  
0.6ns output skew (different bank)  
0.75ns part-to-part skew  
Available in QSOP and SOIC packages  
FUNCTIONALBLOCKDIAGRAM  
O1  
O2  
O3  
O4  
O5  
O6  
O7  
O8  
O9  
O10  
IN  
INDUSTRIAL TEMPERATURE RANGE  
SEPTEMBER 2000  
1
c
1999 Integrated Device Technology, Inc.  
DSC - 5848  

QS532807Q 替代型号

型号 品牌 替代类型 描述 数据表
PI49FCT32807Q PERICOM

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3.3V 1:10 CMOS Clock Driver
PI49FCT32807H PERICOM

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3.3V 1:10 CMOS Clock Driver

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