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PTN3332 PDF预览

PTN3332

更新时间: 2024-11-12 21:53:19
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
16页 91K
描述
High speed differential line receiver

PTN3332 数据手册

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PTN3332  
High speed differential line receiver  
Rev. 01 — 07 January 2004  
Product data  
1. Description  
The PTN3332 is a differential line receiver that implements the electrical  
characteristics of Low-Voltage Differential Signaling (LVDS). This device meets or  
exceeds the requirements of the ANSI TIA/EIA-644 Standard. LVDS is used to  
achieve higher data rates on commonly used media. LVDS overcomes the limitations  
of achievable slew rates and EMI restrictions of previous differential signaling  
techniques. The PTN3332 operates at a 3.3 volt supply level. Any of the four  
differential receivers provides a valid logical output state with a ±100 mV differential  
input voltage within the input common-mode voltage range. The input common-mode  
voltage range allows 1 volt of ground potential difference between two LVDS nodes.  
The intended application of this device is for point-to-point baseband transmission  
rates over a controlled impedance media of approximately 100 . The maximum  
rates and distance of data transfer are dependent upon the attenuation  
characteristics of the media selected and the noise coupling to the environment.  
The PTN3332 is designed to function over the full industrial temperature range of  
40 °C to +85 °C.  
2. Features  
Meets or exceeds the requirements of ANSI TIA/EIA-644 Standard  
Designed for signaling rates of up to 400 Mbps  
Differential input thresholds of ±100 mV  
Power dissipation of 60 mW typical at 200 MHz  
Typical propagation delay of 2.6 ns  
Low Voltage TTL (LVTTL) logic output levels  
Pin compatible with AM26LS32 and SN65LVDS32  
Open-circuit fail safe.  
3. Applications  
Low voltage, low EMI, high speed differential signal receiver  
Point-to-point high speed data transmission  
High performance switches and routers.  

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